NWK933
Pin list
Pin #
MD interface
20
19
28
23
35
36
14
41
40
MII interface
46
45
53
MDC
MDIO
RX_CLK
Input
IOput
Output
Output
Output
Output
Input
Output
Input
Input
Input
Output
Output
Input
Output
Output
Output
IOput
LNKST
IOput
Management interface clock (up to 2.5MHz)
Management data
Receive clock (2.5MHz for 10, 25MHz for 100)
Receive data MII interace
Receive data valid. Active high.
Receive error. Active high. (RXD4 in symbol mode)
Reference clock
Transmit clock (2.5MHz for 10, 25MHz for 100)
Transmit Data MII interface
Transmit Enable. Active high.
Transmit Error. Active high. (TXD4 in symbol mode)
Carrier sense signal. Active high.
Collision signal. Active high.
Auto Negotiation enable. Active high.
MII interrupt control.
Receive / transmit active indication (LED interface). Active low.
Collision active indication (LED interface) Active low.
Full duplex indication when RESET_N high (LED interface). Active low. Input
when RESET_N is low. High input means 933 advertises full duplex capability.
5
12
SPDST
Output
Link OK indication (LED interface). Active low.
Speed indication when RESET_N high (LED interface). High for 100Mb/s mode.
Input when RESET_N is low. Low input means 933 advertises 100Mb/s
capability.
31, 30, 29,
17, 13
PA0, PA1,
PA2, PA3, PA4
Input
Phy address
RXIN
RXIP
TXON
TXOP
TXREF10
TXREF100
RESETN
XTAL1
XTAL2
Input
Input
Output
Output
Input
Input
IOput
Input
Input
Differential receive pair from magnetics (-)
Differential receive pair from magnetics (+)
100 Differential transmit pair to magnetics (-)
100 Differential transmit pair to magnetics (+)
10BASE-T transmitter current setting pin
100BASE-TX transmitter current setting pin
Active low, power on reset output and external reset input
25MHz crystal input
25MHz crystal input
Name
Type
Description
55, 56, 57, 58 RXD0, RXD1,
RXD2, RXD3
51
59
43
64
RX_DV
RX_ER
REFCLK
TX_CLK
TXD2, TXD3
4
2
50
49
22
48
6
7
11
TX_EN
TX_ER
CRS
COL
ANEN
MINT
ACTST
COLST
FDST
60, 61, 62, 63 TXD0, TXD1,
8
MITEL [ MITEL NETWORKS CORPORATION ]
