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MT9123AP 参数 Datasheet PDF下载

MT9123AP图片预览
型号: MT9123AP
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS双语音回声消除器 [CMOS Dual Voice Echo Canceller]
分类和应用:
文件页数/大小: 32 页 / 193 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9123
Adaptive Filter
The adaptive filter is a 1024 tap FIR filter which is
divided into two sections. Each section contains 512
taps providing 64ms of echo estimation. In Normal
configuration, the first section is dedicated to
channel A and the second section to channel B. In
Extended Delay configuration, both sections are
cascaded to provide 128ms of echo estimation in
channel A.
Double-Talk Detector
Preliminary Information
The DTDT register is 16 bits wide. The register value
in hexadecimal can be calculated with the following
equation:
DTDT
(hex)
= hex(DTDT
(dec)
* 32768)
where 0 < DTDT
(dec)
< 1
Example: For DTDT = 0.5625 (-5dB), the
hexadecimal value becomes
hex(
0.5625 * 32768
)
= 4800h
Non-Linear Processor (NLP)
Double-Talk is defined as those periods of time when
signal energy is present in both directions
simultaneously. When this happens, it is necessary
to disable the filter adaptation to prevent divergence
of the adaptive filter coefficients. Note that when
double-talk is detected, the adaptation process is
halted but the echo canceller continues to cancel
echo.
A double-talk condition exists whenever the Sin
signal level is greater than the expected return echo
level. The relative signal levels of Rin (Lrin) and Sin
(Lsin) are compared according to the following
expression to identify a double-talk condition:
Lsin > Lrin + 20log
10
(DTDT)
After echo cancellation, there is always a small
amount of residual echo which may still be audible.
The MT9123 uses an NLP to remove residual echo
signals which have a level lower than the Adaptive
Suppression Threshold (TSUP in G.165). This
threshold depends upon the level of the Rin (Lrin)
reference signal as well as the programmed value of
the Non-Linear Processor Threshold register
(NLPTHR). TSUP can be calculated by the following
equation:
TSUP = Lrin + 20log
10
(NLPTHR)
where NLPTHR is the Non-Linear Processor
Threshold register value and Lrin is the relative
power level expressed in dBm0.
When the level of residual error signal falls below
TSUP, the NLP is activated further attenuating the
residual signal to less than -65dBm0. To prevent a
perceived decrease in background noise due to the
activation of the NLP, a spectrally-shaped comfort
noise, equivalent in power level to the background
noise, is injected. This keeps the perceived noise
level constant. Consequently, the user does not hear
the activation and de-activation of the NLP.
where DTDT is the Double-Talk Detection Threshold.
Lsin and Lrin are the relative signal levels expressed
in dBm0.
A different method is used when it is uncertain
whether Sin consists of a low level double-talk signal
or an echo return. During these periods, the
adaptation process is slowed down but it is not
halted.
Controllerless Mode
In G.165 standard, the echo return loss is expected
to be at least 6dB. This implies that the Double-Talk
Detector Threshold (DTDT) should be set to 0.5
(-6dB). However, in order to get additional
guardband, the DTDT is set internally to 0.5625
(-5dB). In controllerless mode, the Double-Talk
Detector is always active.
Controller Mode
In some applications the return loss can be higher or
lower than 6dB. The MT9123 allows the user to
change the detection threshold to suit each
application’s need. This threshold can be set by
writing the desired threshold value into the DTDT
register.
8-50
Controllerless Mode
The NLP processor can be disabled by connecting
the NLP pin to Vss.
Controller Mode
The NLP processor can be disabled by setting the
NLPDis bit to 1 in Control Register 2.
The NLPTHR register is 16 bits wide. The register
value in hexadecimal can be calculated with the
following equation: