MT9075B
Preliminary Information
†
AC Electrical Characteristics - Motorola Microprocessor Timing
‡
Characteristics
Sym Min Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
8
9
DS low
t
70
50
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DSL
DS High
CS Setup
t
DSH
t
CSS
R/W Setup
t
10
10
0
RWS
Address Setup
CS Hold
t
ADS
CSH
RWH
t
R/W Hold
t
15
15
Address Hold
Data Delay Read
t
ADH
DDR
DHR
t
80
80
80
CL=50pF, R =1kΩ
L
10 Data Hold Read
t
CL=50pF, R =1kΩ
L
11 Data Active to High Z Delay
12 Data Setup Write
13 Data Hold Write
t
DAZ
DSW
DHW
t
10
10
t
*
14 Cycle Time
t
120
CYC
† Characteristics are for clocked operation over the ranges of recommended operating temperature and supply voltage
‡ Typical figures are at 25˚Cand are for design aid only: not guaranteed and not subject to production testing.
* This cycle time is for all accesses other than HDLC FIFOs. For HDLC FIFO accesses, a minimum 100ns is required between successive
Read/Write operations.
t
CYC
t
DSL
V
V
V
DS
CS
TT
TT
TT
t
DSH
t
t
t
CSS
CSH
t
RWH
RWS
R/W
t
t
ADS
ADH
V
V
A0-A4
TT
t
DDR
t
DAZ
VALID DATA
D0-D7
READ
V
TT, CT
t
t
t
DHR
DHW
DSW
D0-D7
WRITE
VALID DATA
V
TT
Note: DS and CS may be connected together.
Figure 11 - Motorola Microprocessor Timing
68
MITEL [ MITEL NETWORKS CORPORATION ]
