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MT9075BP 参数 Datasheet PDF下载

MT9075BP图片预览
型号: MT9075BP
PDF下载: 下载PDF文件 查看货源
内容描述: E1单芯片收发器 [E1 Single Chip Transceiver]
分类和应用: PC
文件页数/大小: 82 页 / 275 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9075B  
Preliminary Information  
Bit  
Name  
Functional Description  
Bit  
Name  
Functional Description  
7
1SEC One Second Timer Status. This bit  
changes state once every 0.5  
second and is synchronous with the  
2SEC timer.  
7
RIU1  
Receive International Use 1. This  
bit is received on the PCM 30 2048  
kbit/sec. link in bit position one of  
the non-frame alignment signal. It is  
used  
for  
CRC-4  
multiframe  
6
5
2SEC Two Second Timer Status. This bit  
changes state once every second  
and is synchronous with the 1SEC  
timer.  
alignment or international use.  
6
RNFAB Receive Non-frame Alignment  
Bit. This bit is received on the PCM  
30 2048 kbit/sec. link in bit position  
two of the non-frame alignment  
signal. This bit should be one in  
order to differentiate between  
frame alignment frames and non-  
frame alignment frames.  
T1  
Timer One. This bit will be high  
after a signal has been received,  
that  
consists  
of  
non-normal  
operation frames, and persists for  
100 msec. This bit shall be low  
when T2 becomes high. Refer to  
I.431 Section 5.9.2.2.3.  
5
RALM Receive Alarm. This bit is received  
on the PCM 30 2048 kbit/sec. link in  
bit position three (the A bit) of the  
non-frame alignment signal. It is  
used as a remote alarm indication  
(RAI) from the far end of the PCM  
30 link (1 - alarm, 0 - normal).  
4
T2  
Timer Two. This bit will be high  
when the MT9075B acquires  
terminal frame synchronization  
persisting for 10 msec. This bit shall  
be  
low  
when  
non-normal  
operational frames are received.  
I.431 Section 5.9.2.2.3.  
4 - 0 RNU4-8 Receive National Use Four to  
Eight. These bits are received on  
3
2
1
400T  
8T  
400 msec. Timer Status. This bit  
changes state when the 400 msec.  
CRC-4 multiframe alignment timer  
expires.  
the PCM 30 2048 kbit/sec. link in bit  
positions four to eight (the S bits)  
of the non-frame alignment signal.  
a
Table 40 - Receive Non-Frame Alignment Signal  
(Page 03H, Address 13H)  
8 msec. Timer Status. This bit  
changes state when the 8 msec.  
CRC-4 multiframe alignment timer  
expires.  
CALN CRC-4 Alignment. This bit changes  
state every msec. When CRC-4  
multiframe alignment has been  
achieved state changes of this bit  
are synchronous with the receive  
CRC-4 synchronization signal.  
0
KLVE Keep Alive. This bit is high when  
the AIS status bit (page 03H,  
address 19H) has been high for at  
least 100msec. This bit will be low  
when AIS goes low (I.431).  
Table 39 - Timer Status Word  
(Page 03H, Address 12H)  
44  
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