MT9075A
Preliminary Information
ST-BUS Bit
Stream
Bit Cell
Bit Cell
Bit Cell
F0b
(Output)
V
TT
t
t
4WO
FPD
t
FPD
C4b
(Output)
V
TT
t
t
4WO
SIH
All Input
Streams
V
TT
t
t
SIS
SOD
All Output
Streams
V
V
TT, CT
Figure 23 - ST-BUS Timing Diagram (Output Clocks)
ST-BUS
Bit Cells
Channel 31
Bit 0
Channel 0
Bit 7
Channel 0
Bit 6
Channel 0
Bit 5
F0b
C4b
Figure 24 - GCI Functional Timing Diagram
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