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MT90210 参数 Datasheet PDF下载

MT90210图片预览
型号: MT90210
PDF下载: 下载PDF文件 查看货源
内容描述: 多速率并行接入电路 [Multi-Rate Parallel Access Circuit]
分类和应用:
文件页数/大小: 27 页 / 136 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT90210
Pin Description (continued)
Pin
58-59,
61-62,
64,
66-68
70
Name
P0-P1,
P2-P3,
P4,
P5-P7
Strobe
Description
Preliminary Information
Parallel Input/Output Data Bus.
This 8 bit data bus is a bidirectional parallel port used to
perform 8-bit transactions between the MT90210 and the external dual port RAM. Data is
clocked in and out of the P0-P7 parallel port according to Figures 22 and 23.
Strobe Output.
This output is typically connected to the Chip-enable input of the external
dual port RAM. It is kept low during all read cycles, stays high during inactive periods and
goes low for the last half of a memory write cycle.
External Memory Address Outputs A0-A12.
These 13 address output lines are provided
by the MT90210 to allow a direct connection to an external dual port RAM.
72-73,
75- 77,
80-82,
84-85,
87,
89-90
91
A0-A1,
A2-A4,
A5-A7,
A8-A9,
A10,
A11-A12
RBC
Read Data Block Complete (output).
A transition on this output is used to notify the
external CPU that the MT90210 has finished reading the contents of one entire 125µs
frame from the external dual port memory (e.g.; from addresses 0000h to 0FFFh in modes
3, 4 or 5). Whenever RBC toggles, the MT90210 starts reading the next half of the memory
(addresses 1000h to 1FFFh) while the local CPU updates the first half with more data to
be sent. RBC toggles every 125µs. When this signal is low, the MT90210 is reading the
lower memory block.
Write Data Block Complete (Output).
A transition on this output is used to notify the
external CPU that the MT90210 has finished writing the contents of one entire 125µs
frame into the external dual port memory (e.g; from addresses 0000h to 0FFFh in modes
3,4 or 5). Once WBC toggles, the local CPU can access the Dual port memory to get the
data while the MT90210 writes the contents of the next 125µs frame into the other half
(addresses 1000h to 1FFFh) of the dual port memory. WBC toggles every 125µs. When
this signal is low, the MT90210 is writing to the lower memory block.
Supply Input.
+5V.
94
WBC
4,16,
63, 71,
78, 86,
92, 99
41, 55
5,10,
17, 23,
60, 65,
69, 74,
79,83,
88, 93,
98
28
V
DD
V
DD2
V
SS
Supply Input.
+5V.
Ground.
V
SS2
Ground.
2-148