MT89L80
AC Electrical Characteristics
†
- Processor Bus (Figures 14)
Characteristics
1
2
3
4
Chip Select Setup Time
Read/Write Setup Time
Address Setup Time
Acknowledgment Delay
Control Register Read
Control Register Write
Connection Memory Read
Connection Memory Write
Data Memory Read
5
6
7
8
Fast Write Data Setup Time
Slow Write Data Delay
Read Data Setup Time
Data Hold Time
Read
Write
9
10
11
12
13
Read Data To High Impedance
Chip Select Hold Time
Read/Write Hold Time
Address Hold Time
Acknowledgment Hold Time
t
AKD
t
AKD
t
AKD
t
AKD
t
AKD
t
FWS
t
SWD
t
RDS
t
DHT
t
DHT
t
RDZ
t
CSH
t
RWH
t
ADH
t
AKH
0
10
5
15
0
0
8
50
80
10
50
90
90
0
122
52
25
62
30
560
120
65
120
53
1220
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Sym
t
CSS
t
RWS
t
ADS
Min
0
5
5
Typ
‡
Max
Advance Information
Units
ns
ns
ns
Test Conditions
C
L
=150 pF
C
L
=150 pF
C
L
=150 pF
C
L
=150 pF
C
L
=150 pF
C
L
= 150 pF
R
L
=1 KΩ
∗
, C
L
=150 pF
R
L
=1 KΩ
∗
, C
L
=150 pF
R
L
=1 KΩ
∗
, C
L
=150 pF
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
DS
V
HM
V
LM
CS
V
HM
V
LM
t
CSS
t
CSH
R/W
V
HM
V
LM
t
RWS
t
RWH
A5
to
A0
V
HM
V
LM
t
ADS
V
HM
V
LM
t
AKD
t
AKH
t
ADH
DTA
*
t
RDS
t
DHT
*
D7
to
D0
V
HM
V
LM
*
t
SWD
t
FWS
t
RDZ
*
Figure 14 - Processor Bus
2-14
MITEL [ MITEL NETWORKS CORPORATION ]
