MT89L80
AC Electrical Characteristics
†
- Clock Timing (Figures 9 and 10)
Characteristics
1
2
3
4
5
6
7
I
N
P
U
T
S
Clock Period*
Clock Width High
Clock Width Low
Clock Transition Time
Frame Pulse SetupTime
Frame Pulse Hold Time
Frame Pulse Width
Sym
t
CLK
t
CH
t
CL
t
CTT
t
FPS
t
FPH
t
FPW
10
10
244
Min
220
85
85
Typ
‡
244
122
122
Max
300
150
150
10
190
190
Advance Information
Units
ns
ns
ns
ns
ns
ns
ns
Test Conditions
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Contents of Connection Memory are not lost if the clock stops, however, ST-BUS outputs go into the high impedance state.
NB:
Frame Pulse is repeated every 512 cycles of C4i.
C4i
F0i
BIT
CELLS
Channel 31
Bit o
Channel 0
Bit 7
Figure 9- Frame Alignment
t
CLK
t
CL
V
HM
C4i
V
LM
t
CHL
t
FPH
F0i
V
HM
V
LM
t
FPW
t
FPS
t
CTT
t
FPH
t
FPS
t
CTT
t
CH
Figure 10 - Clock Timing
2-12
MITEL [ MITEL NETWORKS CORPORATION ]
