ISO-CMOS MT8979
†
AC Electrical Characteristics - CEPT Link Timing (Figures 25 and 26)
‡
Characteristics
Sym Min Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
8
Transmit Steering Delay*
Transmit Steering Transition Time
E2i Clock Period
tTSD
tTST
25
150
40
ns
ns
ns
ns
ns
ns
ns
ns
200 pF load
200 pF load
tPEC
tWEC
tRDS
tRDH
tRSS
tRSH
400
200
30
488
244
600
E2i Clock Width High or Low
Receive Data Setup Time
Receive Data Hold Time
Receive Steering Setup Time
Receive Steering Hold Time
40
30
40
† Characteristics are for clocked operation over the ranges of recommended operating temperature and supply voltage.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* The difference between tTSD for TxA and TxB is not greater than 20 ns.
Transmitted CEPT Link
Bit Cells
Bit Cell
VIH
C2i
VIL
tTSD
tTSD
tTST
tTST
VOH
VOL
TxA
or
TxB
Figure 25 - Transmit Timing for CEPT Link
Received CEPT Link
Bit Cells
Bit Cells
tPEC
tWEC
tWEC
E2i
VIH
VIL
tRDS
tRDH
VIH
RxD
VIL
tRSS
tRSH
VIH
VIL
RxA
or
RxB
Figure 26 - Receive Timing for CEPT Link
4-183
MITEL [ MITEL NETWORKS CORPORATION ]
