MT8979 ISO-CMOS
AC Electrical Characteristics† - ST-BUS Timing (Figures 17 and 18)
‡
Characteristics
C2i Clock Period
Sym Min Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
8
9
tP20
tW20
tFPS
tFPH
tFPW
tSOD
tSIS
400
200
50
488
244
600
ns
ns
ns
ns
ns
ns
ns
ns
ns
C2i Clock Width High or Low
Frame Pulse Setup Time
Frame Pulse Hold Time
Frame Pulse Width
t
= 488 ns
P20
150
50
100
300
Serial Output Delay
150*
150 pF Load
Serial Input Setup Time
Serial Input Hold Time
Frame Pulse Setup Time 2
30
55
20
tSIH
tFPS2
† Characteristics are for clocked operation over the ranges of recommended operating temperature and supply voltage.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* tSOD = 125 ns (max) over 0 - 70°C temperature range.
F0i
C2i
ST-BUS
Channel 31
Bit 0
Channel 0
Bit 7
Channel 0
Bit 6
BIT CELLS
Figure 17 - Clock and Frame Alignment for 2048 kbit/s ST-BUS Streams
ST-BUS
Bit Cell
Bit Stream
tFPW
VIH
F0i
VIL
tP20
tFPS2
tFPH
tW20
tFPS
tW20
VIH
C2i
VIL
tSIS
tSIH
DSTi
or
CSTi0/1
VIH
VIL
tSOD
VOH
VOL
DSTo
or
CSTo
Figure 18 - Clock and Frame Timing for 2048 kbit/s ST-BUS Streams
4-180
MITEL [ MITEL NETWORKS CORPORATION ]
