ISO-CMOS MT8952B
CS
E
E clock initiates and
terminates the read cycle
t
CSE
t
EWH
t
EWL
t
t
r
f
t
CYC
CS
E
CS initiates and
terminates the read cycle
t
CSE
t
t
RWH
RWS
R/W
t
t
AH
AS
A0-A3
t
t
t
DLZ
DHZ
DZL
t
DZH
High Impedance
D0-D7
High Impedance
VALID DATA
NOTE: The read cycle cn be initiated either by the falling edge of CS or the rising edge of E clock whichever occurs last. Similarly
the cycle can be terminated by CS (rising edge) or E clock (falling edge) whichever occurs first. The timing relations are to be
referenced from the active edge initiating or terminating the cycle.
Figure 18 - Timing Information for MPU Read
E
t
IRQR
IRQ
Figure 19 - Interrupt Request Release Time
F0i
t
t
WDLH
WDHL
WD
Figure 20 - Watchdog Timer Input and Output
3-79
MITEL [ MITEL NETWORKS CORPORATION ]
