ISO-CMOS MT8952B
D0-D7
R/W
CS
DSTi
CDSTo
CDSTi
M
I
MT8972
MT8952B
C
R
O
P
R
O
C
E
S
S
O
R
DSTo
E
DIGITAL
TO
TWISTED
WIRE PAIR
HDLC PROTOCOL
CONTROLLER
A0-A3
NETWORK
INTERFACE
CIRCUIT
C4
F0
WD
RST
IRQ
(160 kbits/sec)
CKi
F0i
MS0
0
MS1
0
MS2
0
B-CHANNELS (2 X 64 kbits/sec Max)
Network Interface
Network
Primary Terminal End
Figure 15 - HDLC Protocol Controller at the Primary End of the Link
D0-D7
R/W
CS
DSTi
CDSTo
CDSTi
M
MT8972
MT8952B
I
C
R
O
P
R
O
C
E
S
S
O
R
DIGITAL
NETWORK
INTERFACE
CIRCUIT
DSTo
E
HDLC PROTOCOL
CONTROLLER
TO
TWISTED
WIRE PAIR
A0-A3
C4
F0
WD
RST
IRQ
(160 kbits/sec)
CKi
F0i
MS0
0
MS1
0
MS2
1
B-CHANNELS (2 X 64 kbits/sec Max)
Network Interface
Network
Secondary Terminal End
Figure 16 - HDLC Protocol Controller at the Secondary End of the Link
the outputs of voice codecs (MT896X) providing
voice communication or data codecs (MT8950) for
communication between RS232-C type terminals. It
is possible to use the HDLC protocol on B1 and B2
channels to provide the error detection.
This can be done by using a separate MT8952B
enabled appropriately to shift out the formatted data
during channels 2 and 3 or by multiplexing the same
MT8952B between B- and D- channels.
3-75