ISO-CMOS
MT8940
MT8940
MT8980/81
MS0
MS1
MS2
MS3
F0i
C12i
EN
CV
C8Kb
C16i
EN
C4o
EN
C2o
Ai
Bi
V
SS
RST
F0b
RxA
RxB
Y
o
RxD
C4b
C2i
C2o
F0i
DSTi
DSTo
CSTi0
CSTi1
CSTo
OUTA
OUTB
RxT
RECEIVE
RxR
TRANSMIT
CEPT
PRIMARY
MULTIPLEX
DIGITAL
LINK
V
DD
MH89790
ST-BUS
SWITCH
Crystal Clock
(16.388 MHz
±
32 ppm)
Mode of Operation for the MT8940
DPLL #1 - NOT USED
DPLL #2 - NORMAL (MS0=0; MS1=0; MS2=1; MS3=1)
Figure 7 - Synchronization at the Slave End of the CEPT Digital Transmission Link
MT8940
MS0
MS1
MS2
MS3
F0i
C12i
Crystal Clock
(16.388 MHz
±
32 ppm)
V
DD
DPLL #1 - NOT USED
DPLL #2 - NORMAL MODE
(MS0=0; MS1=0; MS2=1;
MS3=1)
MS0
MS1
MS2
MS3
ST-BUS
F0i
C12i
EN
CV
C8Kb
C16i
EN
C4o
EN
C2o
Ai
Bi
DPLL #1 - NOT USED
DPLL #2 - NORMAL MODE
(MS0=0; MS1=0;
MS2=1; MS3=1)
V
SS
MT8940
V
DD
C4o
C4o
ST-BUS
C4b
TIMING
C2o
SIGNALS
C2o
F0b
RST
C4b
TIMING
C2o
SIGNALS
C2o
F0b
RST
Crystal Clock
(16.388 MHz
±
32 ppm)
EN
CV
C8Kb
C16i
EN
C4o
EN
C2o
Ai
Bi
V
SS
Figure 8 - Generation of the ST-BUS Timing Signals
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