欢迎访问ic37.com |
会员登录 免费注册
发布采购

MT8910-1AC 参数 Datasheet PDF下载

MT8910-1AC图片预览
型号: MT8910-1AC
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUS⑩系列数字用户线接口电路 [CMOS ST-BUS⑩ FAMILY Digital Subscriber Line Interface Circuit]
分类和应用: 综合业务数字网
文件页数/大小: 26 页 / 422 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
 浏览型号MT8910-1AC的Datasheet PDF文件第6页浏览型号MT8910-1AC的Datasheet PDF文件第7页浏览型号MT8910-1AC的Datasheet PDF文件第8页浏览型号MT8910-1AC的Datasheet PDF文件第9页浏览型号MT8910-1AC的Datasheet PDF文件第11页浏览型号MT8910-1AC的Datasheet PDF文件第12页浏览型号MT8910-1AC的Datasheet PDF文件第13页浏览型号MT8910-1AC的Datasheet PDF文件第14页  
MT8910-1  
Preliminary Information  
the superframe position. This function can also be  
activated in software (LT mode only) through a bit in  
Control Register 1 (TxSFB). The transition of this bit  
from a 1 to a 0 will reset the superframe counter, and  
the beginning of the transmitted superframe will be  
referenced to the ST-BUS frame after the frame in  
which the transition in the TxSFB bit occurred.  
superframe synchronization has been achieved. In  
the NT mode, the TxSFB bit is ignored since the  
transmit superframe has a fixed phase relationship  
with respect to the received superframe.  
The MT8910-1 has two possible system port  
configurations; single port mode or dual port mode.  
In the single port mode, the MT8910-1 uses the first  
four timeslots of the DSTi and DSTo data streams  
(as shown in Figure 8). ST-BUS Channel 0 is  
allocated to the D-channel, ST-BUS Channel 1 to the  
C-channel, while ST-BUS Channel 2 and 3 are  
In the NT mode, the SFb pin is an output which  
generates an active low signal at the boundary of the  
transmit superframe. Since the SFb is referenced to  
the receive time base, SFb is only valid after  
F0b  
C4b  
DSTo  
D0 D1  
D0 D1  
C7 C6  
C7 C6  
C1 C0 B7 B6  
B1 B0 B7 B6  
B1 B0  
B1 B0  
D0  
D0  
DSTi  
F0od  
C1 C0 B7 B6  
B1 B0 B7 B6  
15.6 µsec  
Channel Time 0  
D-Channel  
Channel Time 1  
C-Channel  
Channel Time 2  
B1-Channel  
Channel Time 3  
B2-Channel  
Reserved  
Figure 8 - ST-BUS Channel Assignments in Single Port Mode  
F0b  
C4b  
B7 B6 B5 B4 B3 B2 B1 B0  
B7 B6 B5 B4 B3 B2 B1 B0  
B7  
DSTi  
C7 C6 C5 C4 C3 C2 C1 C0  
D0 D1  
C7  
B7  
C7  
CDSTi  
B7 B6 B5 B4 B3 B2 B1 B0  
B7 B6 B5 B4 B3 B2 B1 B0  
DSTo  
CDSTo  
F0od  
C7 C6 C5 C4 C3 C2 C1 C0  
D0 D1  
3.9 µsec  
62.5 µsec  
125 µsec  
Channel Time 16  
Channel Time 0  
Reserved  
Figure 9 - ST-BUS Channel Assignment in Dual Port Mode  
9-12