MT88E39
For applications requiring detection of lower FSK
signal level, the input op-amp may be configured to
provide adequate gain. However, too much gain will
cause noise tolerance to fail the TIA requirements
because the FSK signal will be clipped at GS when
the single tone noise is added.
Advance Information
Vdd
TIP
Vdd
R
2
MT88E39
IN+
V
DD
IC
MODE
PWDN
CD
DR
DATA
DCLK
R
8
*
1
R
9
*
1
Vdd
100nF
20%
C1
R
1
D1
D2
Vdd
Vdd
RING
C2
R
3
D3
D4
R
4
R
5
R
6
R
7
IN-
GS
V
Ref
CAP
100nF
20%
D5
D7
D6
D8
1N5231B
OSC1
Xtal
OSC2
V
SS
100nF
10%
50V
(FSK interface mode 0 selected)
Vdd
= To microcontroller
= From microcontroller
200K
5%
Motorola
4N25
464K
5%
(Ring Detect)
10nF
To microcontroller
330nF R10
10%
250V
Note:
*1 R8 and R9 not required when FSK interface mode 1 is selected.
Unless stated otherwise, resistors are 1%, 0.1 Watt; capacitors are 5%, 6.3V
D1, D2, D3, D4 = diodes, 1N4003 or 1N4148 or equivalent
D5, D6, D7, D8 = bridge rectifier diodes, 1N914
Xtal = 3.579545 MHz, +/-0.2%
R8 = R9 = 100K, 20%
R10 = 12K1, 1W5, 5%, Fusible resistor
R2 = R4 = 34K
For 1000Vrms, 60Hz isolation from Tip to Earth and Ring to Earth:
R1 = R3 = 430K, 0.5W, 5%, 475V minimum. e.g. IRC Type GS-3
C1 = C2 = 2n2, 1332V minimum
If the 1000Vrms is met by other means, then this circuit has to meet FCC part 68 Type B Ringing:
R1 = R3 = 432K, 0.1W, 1%, 56V minimum
C1 = C2 = 2n2, 212V minimum
Example of component values for Vdd = 5V +/- 10%
For Bellcore applications, set input gain = 0dB:
R5 = 53K6
R6 = 60K4
R7 = 464K
Example of component values for Vdd = 3V +/- 10%
For Bellcore applications, set input gain = -3 dB:
R5 = 44K2
R6 = 51K1
R7 = 332K
For ETSI applications, set input gain = -2.5dB:
R5 = 53K6
R6 = 63K4
R7 = 348K
For ETSI applications, set input gain = -5.5dB:
R5 = 44K2
R6 = 53K6
R7 = 249K
Figure 6 - Application Circuit
5-6
MITEL [ MITEL NETWORKS CORPORATION ]
