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MT8880CE 参数 Datasheet PDF下载

MT8880CE图片预览
型号: MT8880CE
PDF下载: 下载PDF文件 查看货源
内容描述: ISO2 -CMOS集成DTMFTransceiver [ISO2-CMOS Integrated DTMFTransceiver]
分类和应用: 电信集成电路光电二极管
文件页数/大小: 18 页 / 315 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ISO
2
-CMOS
MT8880C/MT8880C-1
b2
IRQ
b1
CP/DTMF
b0
TOUT
RS0
0
0
1
1
R/W
0
1
0
1
FUNCTION
Write to Transmit
Data Register
Read from Receive
Data Register
Write to Control
Register
Read from Status
Register
b3
RSEL
Table 3. CRA Bit Positions
b3
C/R
b2
S/D
b1
TEST
b0
BURST
Table 2. Internal Register Functions
Table 4. CRB Bit Positions
BIT
b0
b1
NAME
TOUT
CP/DTMF
FUNCTION
TONE OUTPUT
MODE CONTROL
DESCRIPTION
A logic ‘1’ enables the tone output. This function can be
implemented in either the burst mode or non-burst mode
.
In DTMF mode (logic ‘0’) the device is capable of generating
and receiving Dual Tone Multi-Frequency signals. When the
CP (Call Progress) mode is selected (logic ‘1’) a 6th order
bandpass filter is enabled to allow call progress tones to be
detected. Call progress tones which are within the specified
bandwidth will be presented at the IRQ/CP pin in
rectangular wave format if the IRQ bit has been enabled
(b2=1). Also, when the CP mode and BURST mode have both
been selected, the transmitter will issue DTMF signals with a
burst and pause of 102 ms (typ) duration. This signal duration
is twice that obtained from the DTMF transmitter if DTMF
mode had been selected. Note that DTMF signals cannot be
decoded when the CP mode of operation has been selected.
A logic ‘1’ enables the INTERRUPT mode. When this mode is
active and the DTMF mode has been selected (b1=0) the IRQ/
CP pin will pull to a logic ‘0’ condition when either 1) a valid
DTMF signal has been received and has been present for the
guard time duration or 2) the transmitter is ready for more data
(BURST mode only).
A logic ‘1’ selects Control Register B on the next Write cycle to
the Control Register address. Subsequent Write cycles to the
Control Register are directed back to Control Register A.
b2
IRQ
INTERRUPT ENABLE
b3
RSEL
REGISTER SELECT
Table 5. Control Register A Description
4-41