ISO
2
-CMOS
MT8880C/MT8880C-1
V
DD
MT8880C/C-1
C1
DTMF/CP
INPUT
R2
R1
IN+
IN-
GS
VRef
VSS
X-tal
OSC1
OSC2
DTMF
OUTPUT
TONE
C4
R
L
R/W
CS
VDD
St/GT
ESt
D3
D2
D1
D0
IRQ/CP
Φ2
RS0
R3
C2
C3
R4
To
µP
or
µC
Notes:
R1, R2 = 100 kΩ 1%
R3 = 374
Ω
1%
R4 = 3.3 kΩ 10%
R
L
= 10 k
Ω
(min.)
C1 = 100 nF 5%
C2 = 100 nF 5%
C3 = 100 nF 10%*
C4 = 10 nF 10%
X-tal = 3.579545 MHz
* Microprocessor based systems can inject undesirable noise into
the supply rails. The performance of the MT8880 can be optimized
by keeping noise on the supply rails to a minimum. The decoupling
capacitor (C3) should be connected close to the device and ground
loops should be avoided.
Figure 13 - Application Circuit (Single-Ended Input)
5.0 VDC
MMD6150
(or equivalent)
2.4 kΩ
5.0 VDC
TEST POINT
3 kΩ
TEST POINT
130 pF
24 kΩ
MMD7000
(or equivalent)
70 pF
Test load for D0-D3 pins
Test load for IRQ/CP pin
Figure 14 - Test Circuit
4-43
MITEL [ MITEL NETWORKS CORPORATION ]
