MH89770
Preliminary Information
AC Electrical Characteristics† - Clock Timing (Figure 19 & 20)
‡
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
8
C2i Clock Period
tp20
tW20
400
200
50
488
244
600
300
ns
ns
ns
ns
ns
ns
µs
µs
C2i Clock Width High or Low
Frame Pulse Setup Time
Frame Pulse Hold Time
Frame Pulse Width
tP20 = 488 ns
tFPS
tFPH
50
tFPW
tFPOD
tTxSFH
tTxSFS
50
RxSF Output Delay
TxSF Hold Time
125
50pF Load
0.5
0.5
124.5
124.5
TxSF Setup Time
NB: Frame Pulse is repeated every 125µs in synchronization with the clock.
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
F0i
Frame 1
Frame 12/24
Frame 2
RxSF
TxSF
C2i
ST-BUS
BIT CELLS
Bit
7
Bit Bit
Bit
4
Bit
7
Bit Bit
Bit
4
Bit
7
Bit Bit
Bit
4
6
5
6
5
6
5
Figure 19 - Clock & Frame Alignment for ST-BUS Streams
t
t
P20
W20
V
IH
C2i
V
IL
t
W20
t
t
t
FPS
FPH
FPS
V
IH
t
F0i
FPW
V
IL
t
FPOD
t
FPOD
V
OH
RxSF
V
OL
F0i
C2i
Frame 1
Frame 12/24
V
IH
V
IL
t
TxSFS
t
TxSFH
V
IH
TxSF
V
IL
Figure 20 - Clock & Frame Pulse Timing for ST-BUS Streams
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