SL1711
ABSOLUTE MAXIMUM RATINGS
All voltages are reffered to Vee at 0V
Characteristics
Min
-0.3
Max
7
Units
V
Conditions
Supply voltage, Vcc
IFFIN &IFINB input voltage
IFIN & IFINB input DC offset
IOUT & QOUT DC offset
AGC DC offset
2.5
Vp-p
V
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-55
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
125
V
V
VCO1 & 2 DC offset
V
VCODDIS DC offset
V
PSCAL & PSCALB DC offset
Storage temperature
°C
°C
Junction temperature
PSOP16 package thermal
resistance, chip to ambient
PSOP16 package thermal
resitance, chip to case
MP16 package thermal resistance
chip to Ambient
150
TBA
°C/W
TBA
81
°C/W
°C/W
°C/W
MP16 package thermal resistance
chip to case
28
Power consumption at 5.25V
ESD protection
657
mW
kV
2
Mil std 883B method 3015 cat 1
ADDITIONAL INFORMATION REGARDING THE PSOP PACKAGE.
The following information should be noted when using the PSOP package fitted to the SL1711.
(a)
(b)
This package uses the standard SOIC 16 footprint.
There is no need to make a thermal connection between the package and the board. If such a connection is made using
a thermal adhesive this will enhance the long term reliability of the product by reducing the junction temperature.
(c) The heatsink that is evident on the base of the package is solderable.
(d) There is no direct electrical connection between any of the device pins and the metal heatsinkslug. However if the
heatsink is to be electrically connected to the PCB these connections should be confined to the ground plane.
17