ACE9030
INPUT
3
/
2
4
NOMINAL CYCLES
3
/
2
4
NOMINAL CYCLES
ROLLING
PAIRS OF
3
/
2
4
3
NOMINAL CYCLES
SAMPLES
TO EX-OR
GATE FOR
COMPARISON
/
2
4
NOMINAL CYCLES
3
/
2
4
NOMINAL CYCLES
3
/
2
4
NOMINAL CYCLES
OUTPUT
Fig. 19 F.M. Discriminator Example Timing Diagram
phase effect of f.m. increases as more cycles are exam-
ined. The modulation lines are drawn as the phase change on
the real input waveform but the separation from the nominal
edge position can also be interpreted as the probability of a
whole cycle shift on the sampled version of the signal as in the
ACE9030.
Only six delay comparisons are shown, stepping across
at the sampling rate, but the effect of the pattern can easily be
seen by continuing the sequence, and two conclusions can be
drawn:
pass filter in ACE9030 is first order and has its – 3 dB point at
approximately 70 to 80 kHz to significantly reduce the clock
level; the audio bandpass filter then further reduces this level
to give a cleaner audio output to drive the ACE9040 where it
is again filtered.
Thedemodulationgaincanbedeterminedbyconsidering
the effects of a 1 kHz frequency offset on the input signal, and
using I.F. = 450 kHz and Delay = 2·742 cycles and
VDD = 3·75 V in the example:
A 1 kHz frequency offset will give a phase change in the
I.F. signal, during each cycle, of 2π x (1 kHz / I.F.) radians or
as a fraction of a cycle, (1 kHz / I.F.) which in this example is
1/450 of a cycle.
If the discriminator delay is measured in I.F. cycles the
change in output pulse width for each of the two output pulses
is: (Delay in cycles) x (phase change per cycle)
= Delay x (1 kHz / I.F.) in I.F. periods, which in this example
is 2·742 x 1/450 periods of 450 kHz, or 13·5 ns.
Output pulses occur at a rate of 2 x I.F., so the change in
output pulse width measured in output periods is 2 x (change
measured in I.F. periods), giving 2 x Delay x 1 kHz / I.F. The
dutycycleisdefinedaspulsewidth/periodsotheresultisalso
thechangeindutycycle.Forthisexamplethechangeis0·012.
The output is a logic signal so its amplitude is VDD for all
settings and for all modulation, thus the final effect of a 1 kHz
offset is an output change of 2 x Delay x 1 kHz x VDD / I.F. and
1) The output waveform is at twice the frequency of the input
- this is true for all delay-and-multiply schemes.
2) The output high time is modulated by the phase modulation
accumulated over the delay duration and the output period is
only modulated slightly by the instantaneous input phase
shifts so the effect is to modulate the duty cycle. Due to the
sampling of the I.F. input the modulation will really be
quantised so the width of the modulation box should be read
as a probability of a whole cycle shift in edge position rather
than as a phase shift but the effect is the same when averaged
over many cycles.
By converting the modulation from a phase shift to a duty
cycle all that is then needed to recover the original baseband
signal is to smooth the discriminator output to remove the
900 kHzsampling,leavingananalogsignalproportionaltothe
original frequency deviation and to the delay length. The low-
D7, D6
D
M
Delay as
I.F.
Absolute Gain Absolute Gain Relative Gain
I.F. cycles
kHz
in µV/Hz,
DD = 3·75 V.
45·7
in µV/Hz,
VDD = 4·85 V.
59·1
V
0, 0
0, 0
1, 0
1, 0
0, 1
1, 1
2
2
3
3
3
2
39
39
40
40
37
38
2·742
2·363
4·266
3·677
3·252
2·251
450
450
455
455
450
455
1·8 dB
0·5 dB
5·6 dB
4·3 dB
3·3 dB
0 dB
39·4
70·3
60·6
54·2
50·9
90·9
78·4
70·1
37·1
48·0
Table 5
22
MITEL [ MITEL NETWORKS CORPORATION ]
