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XP1014 参数 Datasheet PDF下载

XP1014图片预览
型号: XP1014
PDF下载: 下载PDF文件 查看货源
内容描述: 8.5-11.0 GHz的砷化镓MMIC功率放大器 [8.5-11.0 GHz GaAs MMIC Power Amplifier]
分类和应用: 射频和微波射频放大器微波放大器功率放大器
文件页数/大小: 5 页 / 166 K
品牌: MIMIX [ MIMIX BROADBAND ]
 浏览型号XP1014的Datasheet PDF文件第1页浏览型号XP1014的Datasheet PDF文件第2页浏览型号XP1014的Datasheet PDF文件第3页浏览型号XP1014的Datasheet PDF文件第5页  
8.5-11.0 GHz GaAs MMIC  
Power Amplifier  
April 2006 - Rev 14-Apr-06  
P1014  
App Note [1] Biasing - This device has been designed with an on-chip gate bias circuit. A nominal bias at Vgg=-5.0V and Vd(1,2)=8.0V  
will typically yield a total drain current Id(TOTAL)=450mA. It is also possible to separately bias each amplifier stage Vd1 through Vd2  
at Vd(1,2)=8.0V with Id1=TBD mA and Id2=TBD mA. Separate biasing is recommended if the amplifier is to be used at high levels of  
saturation, where gate rectification will alter the effective gate control voltage. For non-critical applications it is possible to parallel all  
stages and adjust the common gate voltage for a total drain current Id(total)=450 mA. It is also recommended to use active biasing  
to keep the currents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on the  
supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a low power operational  
amplifier, with a low value resistor in series with the drain supply used to sense the current.The gate of the pHEMT is controlled to  
maintain correct drain current and thus drain voltage. The typical gate voltage needed to do this is -0.7V.Typically the gate is  
protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate  
bias is available before applying the positive drain supply.  
App Note [2] Bias Arrangement -  
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC  
bypass capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or  
combination (if gate or drains are tied together) of DC bias pads.  
For Individual Stage Bias (Recommended for saturated applications) -- Each DC pad (Vd1, 2 and Vg or Vgg) needs to have DC bypass  
capacitance (~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.  
MTTFTable (TBD)  
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.  
Backplate  
Channel  
Rth  
MTTF Hours  
FITs  
Temperature  
Temperature  
55 deg Celsius  
75 deg Celsius  
95 deg Celsius  
deg Celsius  
deg Celsius  
deg Celsius  
C/W  
C/W  
C/W  
E+  
E+  
E+  
E+  
E+  
E+  
Bias Conditions: Vd1=Vd2=8.0V, Id(TOTAL)=450 mA  
Page 4 of 5  
Mimix Broadband, Inc., 10795 Rockley Rd., Houston,Texas 77099  
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com  
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.  
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept  
their obligation to be compliant with U.S. Export Laws.  
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