AUSTIN SEMICONDUCTOR, INC.
MT42C4256 883C
256K x 4 VRAM
Limited Supply - Consult Factory
NONPERSISTENT MASKED WRITE
The MASKED WRITE feature eliminates the need for a
READ-MODIFY-WRITE cycle when changing only specific
bits within a 4-bit word. The MT42C4256 supports two
types of MASKED WRITE cycles, NONPERSISTENT
MASKED WRITE and PERSISTENT MASKED WRITE.
If
?
M
/
E/(?W
/
E) and DSF are LOW at the
/
R
/
A
/
S HIGH-to-
LOW transition, a NONPERSISTENT MASKED WRITE is
performed and the data (mask data) present on the DQ1-
DQ4 inputs will be written into the mask data register. The
mask data acts as an individual write enable for each of the
four DQ1-DQ4 pins. If a LOW (logic “0”) is written to a
mask data register bit, the input port for that bit is disabled
during the subsequent WRITE operation and no new data
will be written to that DRAM cell location. A HIGH (logic
“1”) on a mask data register bit enables the input port and
allows normal WRITE operation to proceed. Note that
/
C
/
A
/
S
is still HIGH. When
/
C
/
A
/
S goes LOW, the bits present on the
DQ1-DQ4 inputs will be either written to the DRAM (if the
mask data bit is HIGH) or ignored (if the mask data bit is
LOW). The DRAM contents that correspond to masked
input bits will not be changed during the WRITE cycle. The
MASKED WRITE is nonpersistent (must be re-entered at
every
/
R
?
A
/
S cycle) if DSF is LOW when
/
R
?
A
/
S goes LOW. The
mask data register is cleared at the end of every NONPER-
SISTENT MASKED WRITE. FAST PAGE MODE can be
used with NONPERSISTENT MASKED WRITE to write
several column locations in an addressed row. The same
mask is used during the entire FAST-PAGE-MODE
/
R
/
A
/
S
cycle. An example NONPERSISTENT MASKED WRITE
cycle is shown in Figure 1.
NONPERSISTENT MASKED WRITE
RAS
NONPERSISTENT MASKED WRITE
CAS
ME/WE
DSF
STORED
DATA
1
1
0
0
BEFORE
MASK
0
1
0
1
,, ,, ,,,
,, ,, ,
,
,
,
INPUT
X
0
X
1
STORED STORED
MASK
DATA
DATA (RE-WRITE)
1
0
0
1
AFTER
0
0
0
0
BEFORE
0
1
0
1
STORED
X
1
STORED
DATA
0
1
0
1
AFTER
ADDRESS 0
ADDRESS 1
X = NOT EFFECTIVE (DON’T CARE)
,,
X
1
DON’T CARE
Figure 1
NONPERSISTENT MASKED WRITE EXAMPLE
MT42C4256 883C
REV. 3/97
DS000016
3-31
Austin Semiconductor, Inc., reserves the right to change products or specifications without notice.
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