PRELIMINARY
MTS1512K8CxxLSJ2
4Mb Monolithic SRAM
CAPACITANCE
PARAMETER
Input Capacitance
SYMBOL
CI
CONDITIONS
MAX
UNITS
V =0V, ƒ=1.0MHz
IN
8
8
pf
pf
Output Capacitance
V =0V, ƒ=1.0MHz
IN
CO
481 ohm
255 ohm
481 ohm
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
Input Rise & Fall times
Input Timing Reference levels
Output Timing Reference levels
Output Test Load
LIMIT
VSS to 3.0
≤ 3
1.5
1.5
Figure 1
Figure 2
UNITS
255 ohm
30 pF
5 pF
V
ns
V
V
Figure 1
Figure 2
Output Test Load (Z testing)
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input leakage current
SYMBOL
VOH
CONDITIONS
MIN
MAX
UNITS NOTE(S)
VCC=Min., IOH = -4.0 mA
VCC=Min., IOH = 8.0mA
2.4
V
V
V
V
1
1
0.4
VCC+0.5
0.8
VOL
V
IH
2.2
-0.5
-10
1
1,2
V
IL
GND < VI < VCC
10
A
µ
IIX
GND < VO < VCC
(Output disabled)
12ns
Output leakage current
-10
10
A
IOZ
µ
80
80
75
75
75
75
75
mA
mA
mA
mA
mA
mA
mA
3
3
3
3
3
3
3
Operating current
15ns
17ns
20ns
25ns
35ns
45ns
ICC1
CS\
≥ VIH, all other inputs ≤
Standby, TTL inputs
30
20
mA
mA
ICC2
VIL, VCC = MAX, ƒ = 0, Outputs
Open
CS\ V -0.2V; VCC = MAX,
≥
CC
Standby, CMOS inputs
ICC3
V
IN
V
SS +0.2V or V
V -
≥
CC
≤
IH
0.2V; = 0
ƒ
MTS1512K8C-L - Rev 1.1 - 07/12
Minco Technology Labs, LLC reserves the right to change products or specification without notice.
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