FLASH
AS8F512K32
Austin Semiconductor, Inc.
Command Denfinitions Table
Bus Cycles
Third Fourth
Command Sequence
First
Second
Fifth
Sixth
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Reset
Read
Algorithm Selection
Program
Chip Erase
Sector Erase
1
4
4
4
6
6
XXXX F0
5555 AA 2AAA
5555 AA 2AAA
5555 AA 2AAA
5555 AA 2AAA
5555 AA 2AAA
55
55
55
55
55
5555
5555
5555
5555
RA
RA
PA
RD
RD
PD
5555 AA 2AAA
5555 AA 2AAA
55
55
5555
SA
10
30
Sector Erase Supend
Sector Erase Resume
XXXX B0 Erase-supend vaild during sector-erase operation
XXXX 30 Erase-resume vaild only after erase supend
LEGEND:
RA = Address of the location to be read
PA = Address of the location to be programed
SA = Address of the sector to erased
Addresses A18, A17, A16 select 1 of 8 sectors
RD = Data to be read at selected address location
PD = Data to be programmed at selected address location
*Address pin A18, A17, A16, A15 = VIL or VIH for al bus cycle addresses except for program address (PA),
sector address(SA), and read address (RA).
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55°C < TA < 125°C;VCC = 5V +5%/-10%)
µΑ
µΑ
µΑ
NOTES:
1. Icc active while Embedded Program or Embedded Erase Algorithm is in progress.
2. Not 100% tested.
3. Applies to 32 bit operations.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8F512K32
Rev. 4.0 6/01
10