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LX1691IPW 参数 Datasheet PDF下载

LX1691IPW图片预览
型号: LX1691IPW
PDF下载: 下载PDF文件 查看货源
内容描述: 增强多模式CCFL控制器 [Enhanced Multi-Mode CCFL Controller]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 15 页 / 270 K
品牌: MICROSEMI [ MICROSEMI CORPORATION ]
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LX1691
TM
®
Enhanced Multi-Mode CCFL Controller
P
RODUCTION
D
ATA
S
HEET
FUNCTIONAL PIN DESCRIPTION
(CONTINUED)
P
IN
N
AME
D
ESCRIPTION
Dimming Mode Input. This three state input pin places the IC in Analog Dimming Mode, internal Digital Dimming
Mode, or external Digital Dimming Mode. If the input is left open or forced to V
DDA
/ 2, Analog mode is selected.
If connected to V
DDA
, Digital Dimming mode with an external clock from the DD_CLK input controls the burst
timing generator. Burst frequency is the external clock frequency divided by 512. If DIM_MODE is connected
to Ground, Digital Dimming with an internal clock is selected. Burst frequency in internal clock mode is lamp
current frequency divided by 512, and burst duty cycle is directly proportional to the voltage at BRITE_IN.
Over Current Sense Input. A full wave AC voltage input centered on ground that is proportional to total high
voltage transformer secondary winding current. The OC_SNS input is full wave rectified, and then applied to a
digital comparator with a 2V reference to cause peak voltages greater than 2V to establish another regulation
loop besides ISNS regulation loop. If an abnormal condition continues (>2V) then over current shut-off occurs.
Frequency range of the input signal is 10 KHz to 500KHz. Normal operating voltage is less than ± 2V, and
abnormal voltage can operate continuously as high as ± 7V peak under load fault conditions. Transients under
fault conditions can reach ± 10VPK. Input voltage greater than ± 3V peak but less than ± 10V peak may cause
saturation but will not cause malfunction, phase reversal, or reliability issues with the IC.
Over Voltage Sense Input. A full wave AC voltage input centered around ground that is proportional to lamp
voltage. The OV_SNS input will be full wave rectified, then applied to a digital comparator with a 2V reference to
cause peak voltage greater than 2V to digitally reset the PWM logic on a pulse by pulse basis.
Frequency range of the input signal is 10Khz to 500KHz. Normal operating voltage is less than ± 2V, and
abnormal voltage can operate continuously as high as ±7V peak under load fault conditions. Transients under
fault conditions can reach ± 10VPK. Input voltage greater than ± 3V peak but less than ± 10V peak may cause
saturation but will not cause malfunction, phase reversal, or reliability issues with the IC. The input has a 20K
±12K (max over temperature) pull down resistor that serves as a DC restorer to the external capacitor that
divides down lamp voltage.
Current Sense Input. A full wave AC voltage input centered around ground that is proportional to lamp current.
The I_SNS input is full wave rectified and amplified, then presented to the inverting input of the current error
amplifier. During the strike mode the current sense input will regulate to 2V regardless of BRITE_IN setting.
Frequency range of the input signal is 10 KHz to 500KHz. Normal operating voltage is less than ± 2V, and
abnormal voltage can operate continuously as high as ± 7V peak under load fault conditions. Transient under
fault conditions can reach ± 10VPK. Input voltages of up to ± 3V peak are linearly rectified. Input voltage above
± 3V peak but less than ±10V peak may cause saturation but do not cause malfunction, phase reversal, or
reliability issues with the IC.
Error Amp Output. An external capacitor is connected from this pin to GND to adjust loop response of the
inverter module. This capacitor value can vary from 10pF to 5000pF in various applications.
Brightness Control Input. The input signal should be a DC voltage or a filtered high frequency pulse width
modulated digital signal. Active DC voltage range is 0.0 to 2.0V. On chip signal conditioning amplifiers clip
inputs above 2V.
Chip Enable Input. If logic high, all functions are enabled. If logic low, internal power is disconnected from the
V
DDP
pin, disabling all functions. Maximum current into V
DDP
when ENABLE < 0.3V, V
DDP
<5V, is 10µA. ENABLE
may be connected directly to V
DDP
if the disable function is not used.
Current Reference Resistor Input. Connects to an external resistor that determines the magnitude of internal
bias currents. The nominal lamp frequency can be adjusted by varying this resistor value in the range of 40K to
100K Ohms.
1.00V
I
I_R
=
R
I_R
WWW .
Microsemi
.C
OM
DIM_MODE*
OC_SNS
OV_SNS
I_SNS
EA_OUT
BRITE_IN
ENABLE
P
ACKAGE
D
ATA
P
ACKAGE
D
ATA
I_R
*See dimming mode truth table for a summary of dimming operation with respect to DD_CLK & DIM_MODE inputs.
Copyright
©
2003
Rev. 1.0, 7/16/2004
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3