RangeMAX™
TM
®
LX1688
Multiple Lamp CCFL Controller
P
RODUCTION
D
ATA
S
HEET
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VDD_P, VDD)................................................................................ 6.5V
Digital Inputs ................................................................................... -0.3V to VDD +0.5V
Analog Inputs.................................................................................. –0.1V to VDD +0.5V
Digital Outputs................................................................................. -0.3V to VDD +0.5V
Analog Outputs ................................................................................ -0.1V to VDD +0.5V
Maximum Operating Junction Temperature ............................................................150°C
Storage Temperature................................................................................. -65°C to 150°C
Peak Package Solder Reflow Temp. (40 seconds max. exposure) ................260°C(+0.-5)
Note 1: Exceeding these ratings could cause damage to the device. All voltages are with
respect to Ground. Currents are positive into, negative out of the specified terminal.
THERMAL DATA
PACKAGE PIN OUT
WWW .
Microsemi
.C
OM
A
OUT
VSS_P
VSS
BEPOL
BRITE
CPOR
ENABLE
I_R
CPWM1
CPWM2
RMP_RST
PHA_SYNC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
B
OUT
VDD_P
VDD
VDDSW
TRI_C
OLSNS
ISNS
ICOMP
VCOMP
VSNS
SLAVE
FAULT
PW P
ACKAGE
(Top View)
RoHS / Pb-free 100% matte Tin Lead Finish
PW
Plastic TSSOP 24-Pin
THERMAL RESISTANCE
-
JUNCTION TO
A
MBIENT
,
θ
JA
100°C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board system. All of the
above assume no ambient airflow.
Pin Name
A
OUT
VSS_P
VSS
BEPOL
BRITE
CPOR
ENABLE
I_R
CPWM1
FUNCTIONAL PIN DESCRIPTION
Description
Pin Name
Output Driver A
Connects to dedicated GND for Aout and Bout
Drivers
Connects to analog GND
Tri-mode input pin to control the polarity of the
ENABLE and BRITE signal
Analog/PWM input for brightness control
Connects an external capacitor C
POR
to VDD and
is used for setting power-up reset pulse width.
Used to enable or disable the chip
Connects to external resistor R
I
; for bias current
setting for internal oscillator
Connects to external capacitor C
PWM
, used for
integrating an external digital PWM signal for
analog dimming
Connects to external capacitor C
PWM
, used for
integrating an external digital PWM signal for
analog dimming.
If SLAVE = “0”, RMP_RST is a CMOS output; if
SLAVE = “1”, it is a CMOS input that locks the
ramp oscillation frequency to the master clock
If SLAVE= “0”, PHA_SYNC is a CMOS output; if
SLAVE = “1”, it is a CMOS input that make the
A
OUT
/B
OUT
phase synchronous with the master
B
OUT
VDD_P
VDD
VDDSW
TRI_C
OLSNS
ISNS
ICOMP
VCOMP
Description
Output Driver B
Connects to dedicated VDD for Aout and Bout
Drivers
Connects to analog VDD
Switchable VDD output controlled by ENABLE
Connects to external capacitor C
TRI
Analog input to detect open-lamp condition
Analog input from lamp current, has built-in 300mv
offset
Current error Amp’s output; connects to external
capacitor C
ICOMP
Voltage error Amp’s output; connects to external
capacitor C
VCOMP
, can be used for soft-start
P
ACKAGE
D
ATA
P
ACKAGE
D
ATA
CPWM2
VSNS
Analog input from transformer output voltage
Input control pin for setting the IC either in Master
or Slave mode; “1” for slave mode and “0” for
master mode.
Digital output to indicate maximum number of lamp
striking attempts has occurred without lamp
ignition.
RMP_RST
SLAVE
PHA_SYNC
FAULT
Copyright
©
2001
Rev. 1.2, 2006-03-09
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
MICROSEMI [ MICROSEMI CORPORATION ]
