DATA SHEET
VSP 94x2A
2
Table 3–8: I C bus command description, continued
Bit
Subaddress 49h
D7-D0 HINC1_7-0
Name
Description
Horizontal Post-Scaler Increment 1
‘100000000’: −32 pixel
[BP-POS]
‘000000000’: 0 pixel
‘011111111’: 31.875 pixel
Subaddress 4Ah
D7-D0 HINC2_7-0
Horizontal Post-Scaler Increment 2
‘100000000’: −32 pixel
[BP-POS]
‘000000000’: 0 pixel
‘011111111’: 31.875 pixel
Subaddress 4Bh
D7-D0 HINC3_7-0
Horizontal Post-Scaler Increment 3
‘100000000’: −32 pixel
[BP-POS]
‘000000000’: 0 pixel
‘011111111’: 31.875 pixel
Subaddress 4Ch
D7-D0 HINC4_7-0
Horizontal Post-Scaler Increment 4
‘100000000’: -32 pixel
[BP-POS]
‘000000000’: 0 pixel
‘011111111’: 31.875 pixel
Subaddress 4Dh
D7
V656DEL
V656 delay
[BP-POS]
0: identical delay for modification
1: field 0 is one line shorter
Note: has only effect when AFPROC=1
D6
D5
AFPROC
[BP-POS]
Active Field Processing for 656V generation
0: inverted active field used as v-sync output
1: v-sync modifies end of active video
CLKOUTSEL72
[BP-POS]
Output clock select
0: CLKOUT depends on CLKOUTSEL
1: CLKOUT is identical to clkb72
D4
D3
D2
D1
D0
HINC4_8
[BP-POS]
Belongs to 4Ch
Belongs to 4Bh
Belongs to 4Ah
Belongs to 49h
Belongs to 48h
HINC3_8
[BP-POS]
HINC2_8
[BP-POS]
HINC1_8
[BP-POS]
HINC0_8
[BP-POS]
Micronas
Aug. 16, 2004; 6251-552-1DS
71
MICRONAS [ MICRONAS ]
