VSP 94x2A
DATA SHEET
Pin
No.
Pin Name
CVBS2
CVBS3
CVBS4
CVBS5
CVBS6
CVBS7
Type
Connection
(If not used)
Short Description
53
54
55
56
57
58
I
I
I
I
I
I
Connect to
Vss
CVBS input (Analog input)
CVBS input (Analog input)
CVBS input or Y1 (Analog input)
CVBS input or C1 (Analog input)
CVBS input or Y2 (Analog input)
CVBS input or C2 (Analog input)
Connect to
Vss
Connect to
Vss
Connect to
Vss
Connect to
Vss
Connect to
Vss
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
VDD33C
VSS33C
CVBSO3
CVBSO2
CVBSO1
VDDAC2
VSSAC2
VDDD1
S
S
O
O
O
S
S
S
S
S
O
I
Supply voltage CVBS (3.3 V)
Supply voltage CVBS (0 V)
CVBS output 3 (Analog output)
CVBS output 2 (Analog output)
CVBS output 1 (Analog output)
Supply voltage CVBS2 (1.8 V)
Supply voltage CVBS2 (0 V)
Leave open
Leave open
Leave open
Supply voltage for digital (1.8 V digital)
Supply voltage for digital (0 V digital)
Supply voltage for PLL (1.8 V)
Crystal connection 2
VSSD1
VDDAPLL
XOUT
XIN
Crystal connection 1
TCLK
I
Testclock
VDDP1
S
S
I/O
Supply voltage for digital (3.3 V pad)
Supply voltage for digital (0 V pad)
Separate H input for 656 / 20.25 clock output
VSSP1
656HIN/CLKF20
Connect to
Vss and dis-
able clock
75
76
77
78
79
VDDDACV
AVOUT
S/I
O/I
S/I
S/I
O/I
Leave open
Leave open
Leave open
DAC (V) (27 MHz nom.)
V output
VSSDACV
VDDDACU
AUOUT
DAC (V)
DAC (U)
U output
108
Aug. 16, 2004; 6251-552-1DS
Micronas