VPX 322xE
ADVANCE INFORMATION
dB
2.3.9. Luminance Notch
10
0
If a composite video signal is applied, the color informa-
tion is suppressed by a programmable notch filter. The
position of the filter center frequency depends on the
subcarrier frequency for PAL/NTSC. For SECAM, the
notch is directly controlled by the chroma carrier fre-
quency. This considerably reduces the cross-lumi-
nance. The frequency responses for all three systems
are shown in Fig. 2–11. In S-VHS mode, this filter is by-
passed.
–10
–20
–30
–40
0
2
4
6
8
10 MHz
PAL/NTSC notch filter
2.4. Video Sync Processing
Fig. 2–10 shows a block diagram of the front-end sync
processing. To extract the sync information from the
video signal, a linear phase lowpass filter eliminates all
noise and video contents above 1 MHz. The sync is sep-
arated by a slicer; the sync phase is measured. The in-
ternal controller can select variable windows to improve
the noise immunity of the slicer. The phase comparator
measures the falling edge of sync, as well as the inte-
grated sync pulse.
dB
10
0
–10
–20
–30
–40
The sync phase error is filtered by a phase-locked loop
that is computed by the FP. All timing in the front-end is
derived from a counter that is part of this PLL, and it thus
counts synchronously to the video signal.
0
2
4
6
8
10 MHz
SECAM notch filter
A separate hardware block measures the signal back
porch and also allows gathering the maximum/minimum
of the video signal. This information is processed by the
FP and used for gain control and clamping.
Fig. 2–11: Frequency responses of the luma
notch filter for PAL, NTSC, SECAM
For vertical sync separation, the sliced video signal is in-
tegrated. The FP uses the integrator value to derive ver-
tical sync and field information.
the rest of the video processing system in the backend.
The resizer unit uses them for data interpolation and
orthogonalization. A separate timing block derives the
timing reference signals HREF and VREF from the hori-
zontal sync.
Frequency and phase characteristics of the analog vid-
eo signal are derived from PLL1. The results are fed to
PLL1
lowpass
front sync
skew
vblank
field
horizontal
phase
comparator
& lowpass
front
1 MHz &
sync
counter
sync
sync
separation
generator
video
slicer
input
clock
synthesizer
syncs
clamp &
clock
H/V syncs
front-end
timing
signal
measurement
Fig. 2–10: Sync separation block diagram
clamping color key FIFO_write
14
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