ADVANCE INFORMATION
VPC 323xD, VPC 324xD
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
Chroma – Path
R
Input Resistance
SVHS Chroma
CIN
VIN1
1.4
1.08
–
2.0
1.2
1.5
128
2.6
1.32
–
kΩ
CIN
V
Full Scale Input Voltage,
Chroma
V
V
CIN
PP
V
Input Bias Level,
SVHS Chroma
CINDC
Binary Code for Open
Chroma Input
Component – Path
R
Input Resistance
R1/CR1IN
G1/Y1IN
1
MΩ
Code Clamp–DAC=0
VIN
B1/CB1IN
R2/CR2IN
G2/Y2IN
C
Input Capacitance
4.5
1.1
1.6
pF
VIN
V
V
V
Full Scale Input Voltage
Full Scale Input Voltage
Input Clamping Level RGB, Y
0.85
1.2
1.0
V
V
V
min. Gain (XAR=-0)
max. Gain (XAR=-1)
VIN
PP
PP
B2/CB2IN
1.4
VIN
1.06
Binary Level = 16 LSB
XAR=-0
VINCL
V
Input Clamping Level Cr, Cb
1.5
2.0
V
Binary Level = 128 LSB
XAR=-0
VINCL
Gain Match
tbd
%
Full Scale at 1 MHz, XAR=-0
6 Bit – I–DAC, bipolar
Q
Clamping DAC Resolution
Input Clamping Current per step
–32
31
steps
µA
CL
V
=1.5 V
VIN
I
0.59
0.85
1.11
±0.5
CL–LSB
DNL
Clamping DAC Differential Non-
Linearity
LSB
ICL
Dynamic Characteristics for all Video-Paths (Luma + Chroma) and Component-Paths
BW
Bandwidth
VIN1
VIN2
VIN3
VIN4
R1/CR1IN
G1/Y1IN
B1/CB1IN
R2/CR2IN
G2/Y2IN
B2/CB2IN
8
10
MHz
dB
–2 dBr input signal level
1 MHz, –2 dBr signal level
XTALK
THD
Crosstalk, any Two Video Inputs
Total Harmonic Distortion
–56
−50
−tbd
−tbd
dB
1 MHz, 5 harmonics,
–2 dBr signal level
SINAD
Signal to Noise and Distortion
Ratio
tbd
45
dB
1 MHz, all outputs,
–2 dBr signal level
INL
DNL
DG
DP
Integral Non-Linearity
Differential Non-Linearity
Differential Gain
±1tbd
±0.8
±3
LSB
LSB
%
Code Density,
DC-ramp
–12 dBr, 4.4 MHz signal on
DC-ramp
Differential Phase
1.5
deg
Micronas
65
MICRONAS [ MICRONAS ]
