ADVANCE INFORMATION
VDP 313xY
3.6.3. Recommended Crystal Characteristics
Symbol
Parameter
Min.
Typ.
Max.
Unit
°C
TA
fP
Operating Ambient Temperature
0
−
65
Parallel Resonance Frequency
−
20.250000
−
MHz
with Load Capacitance CL = 13 pF
∆fP/fP
∆fP/fP
RR
Accuracy of Adjustment
Frequency Temperature Drift
Series Resistance
−
−
−
−
−
−
±20
±30
25
7
ppm
ppm
Ω
−
−
C0
Shunt Capacitance
3
pF
C1
Motional Capacitance
20
30
fF
Load Capacitance Recommendation
CLext
External Load Capacitance 1) from
−
3.3
−
pF
pins to Ground
(pin names: Xtal1 Xtal2)
DCO Characteristics 2,3)
CICLoadmin Effective Load Capacitance @ min.
3
4.3
5.5
15
pF
pF
DCO–Position, Code 0,
package: 64PSDIP
CICLoadrng
Effective Load Capacitance Range, 11
DCO Codes from 0..255
12.7
1) Remarks on defining the External Load Capacitance:
External capacitors at each crystal pin to ground are required. They are necessary to tune the effective load
capacitance of the PCBs to the required load capacitance CL of the crystal. The higher the capacitors, the lower
the clock frequency results. The nominal free running frequency should match fp MHz. Due to different layouts
of customer PCBs the matching capacitor size should be determined in the application. The suggested value is
a figure based on experience with various PCB layouts.
Tuning condition: Code DVCO Register = −720
2) Remarks on Pulling Range of DCO:
The pulling range of the DCO is a function of the used crystal and effective load capacitance of the IC (CICLoad
+CLoadBoard). The resulting frequency fL with an effective load capacitance of CLeff = CICLoad + CLoadBoard is:
1 + 0.5 × [ C1 / (C0 + CLeff) ]
fL = fP × _______________________
1 + 0.5 × [ C1 / (C0 + CL) ]
3) Remarks on DCO codes
The DCO hardware register has 8 bits, the fp control register uses a range of –2048...2047
Micronas
61
MICRONAS [ MICRONAS ]
