VDP 313xY
ADVANCE INFORMATION
2.11.5.Fast Blank Monitor
2.11.7.IO Port Expander
The presence of external analog RGB sources can be
detected by means of a fast blank monitor. The status
of the selected fast blank input can be monitored via
an I2C bus register. There is a 2 bit information, giving
static and dynamic indication of a fast blank signal.
The static bit is directly reading the fast blank input
line, whereas the dynamic bit is reading the status of a
flip-flop triggered by the negative edge of the fast blank
signal.
The VDP 313xY provides a general purpose IO port to
control and monitor up to seven external signals. The
port direction is programmable for each bit individually.
Via I2C bus register it is possible to write or read each
port pin. Because of the relatively low I2C bus speed,
only slow or static signals can be handled.
With this monitor logic it is possible to detect if there is
an external RGB source active and if it is a full screen
insertion or only a box. The monitor logic is connected
directly to the FBLIN1 or FBLIN2 pin. Selection is done
via I2C bus register.
2.11.6. Half Contrast Control
Insertion of transparent text pages or OSD onto the
video picture is often difficult to read, especially if the
video contrast is high. The VDP 313xY allows contrast
reduction of the video background by means of a half
contrast input (HCS pin). This input can be supplied
with a fast switching signal (similar to the fast blank
input), typically defining a rectangular box in which the
video picture is displayed with reduced contrast. The
analog RGB inputs are still displayed with full contrast.
FBFOH1 FBFOL1
FBPOL
#
FBPRIO
HCSPOL
HCS
FBLIN1
#
HCS intern
FB
int
Fast
Blank
Monitor
Fast
Blank
Selection
HCSEN HCSFOH
Fig. 2–22: Half Contrast Switch Logic
FBLIN2
#
FBFOH2 FBFOL2 FBMON
Fig. 2–21: Fast Blank Selection Logic
24
Micronas
MICRONAS [ MICRONAS ]
