ADVANCE INFORMATION
VCT 38xxA
Fig. 6–5: 128-pin PMQFP package
VSUPAF
6.6. Pin Circuits
To ADC
VSUPS
GNDAF
GNDS
Fig. 6–10: Input pins VIN1–VIN4
Fig. 6–6: Input pins TEST, DISINTROM
VSUPAF
VSUPS
To ADC
GNDAF
Fig. 6–11: Input pins CIN1, CIN2
N
GNDS
Fig. 6–7: Input/Output pins RESQ, SDA, SCL
VSUPAF
VSUPS
To ADC
P
P
GNDAF
Fig. 6–12: Input pins CRIN, CBIN
P
XTAL2
XTAL1
fXTAL
0.5M
N
N
N
VSUPAF
VINx
–
+
P
N
GNDS
Fig. 6–8: Input/Output pins XTAL1, XTAL2
VREF
GNDAF
VSUPD
P
Fig. 6–13: Output pin VOUT
N
VSUPAF
GNDD
–
P
+
Fig. 6–9: Output pin CLK20
VRT
ADC Reference
=
VREF
SGND
Fig. 6–14: Supply pins VRT, SGND
Micronas
147
MICRONAS [ MICRONAS ]
