ADVANCE INFORMATION
VCT 38xxA
5.18.6.CLK20 Output Port
5.18.6.1. Features
– programmable driver strength
– tristate mode
The CLK20 pin delivers the internal 20.25-MHz clock.
The output stage is push-pull with programmable
driver strength (C20M.DSTR). The CLK20 pin can
alternatively be used as digital output port. It is possi-
ble to force the CLK20 output either to High or Low
(C20M.FSO) or to switch it into tristate mode
(C20M.DOD). After reset, the CLK20 port is enabled.
– digital output port
VDD
CLK20
CLK20
VSS
6
DB
C20M
Fig. 5–8: CLK20 Port Circuit
331: 1F9D
332: C20M
333: CLK20 Mode Register
bit
7
6
5
4
0
3
DOD
0
2
1
DSTR
0
0
0
w
FSO
reset
0
0
0
DSTR
w000:
w111:
Driver Strength
Output driver strong
Output driver weak
DOD
w1:
w0:
Disable Output Driver
Output driver is high-impedance
Output driver is enabled
FSO
w10:
w11:
Force Static Output
Output driver is forced to 1
Output driver is forced to 0
Micronas
131
MICRONAS [ MICRONAS ]
