ADVANCE INFORMATION
VCT 38xxA
5.17.5.ADC Registers
Table 5–21: ADC input multiplexer
A write access to register AD0 starts the A/D conver-
sion of the written channel number and sampling dura-
tion. The flag EOC signals the end of conversion. The
result is stored in register AD1 (bit 9 to 2) and in regis-
ter AD0 (bit 1 and 0).
CHANNEL
Port Pin
none
P10
P11
P12
P13
P14
P15
P16
P17
P20
P21
P22
P23
P24
P25
P26
0
1
2
280: 1FA8
281: AD0
282: ADC Register 0
3
bit
7
6
5
4
3
2
1
0
r
EOC
CMPO
x
x
x
x
AN1
AN0
4
w
TSAMP
CHANNEL
reset
0
0
0
0
0
0
0
0
5
6
283: 1FA9
284: AD1
285: ADC Register 1
7
bit
r
7
6
5
4
3
2
1
0
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
8
reset
9
EOC
r1:
r0:
End of Conversion
End of conversion
Busy
10
11
12
13
14
15
EOC is reset by a write access to the register AD0.
EOC must be true before starting the first conversion
after enabling the module by setting SR1.ADC.
CMPO
r1:
r0:
Comparator Output
Input is lower than reference voltage.
Input is higher than reference voltage.
TSAMP
Sampling Time
AN 9 to 0 Analog Value Bit 9 to 0
The 10 bit analog value is in the range of 0 to 1023.
The 8 MSB can be read from register AD1. The two
LSB can be read from register AD0. The result is avail-
able until a new conversion is started.
TSAMP adjusts the sample time and the conversion
time. The total conversion time is 20 clock cycles
longer than the sample time. Sampling starts one clock
cycle after completion of the write access to AD0.
Table 5–20: Sampling time adjustment
TSAMP
tSample
tConversion
0H
1H
2H
3H
20 T
60 T
40 T
80 T
OSC
OSC
OSC
OSC
140 T
300 T
160 T
320 T
OSC
OSC
OSC
OSC
CHANNEL Channel of Input Multiplexer
CHANNEL selects from which port pin the conversion
is done. The MSB of CHANNEL is bit 3. No port pin is
connected to the ADC if the channel 0 is selected. In
this case the input of the A/D converter is connected to
ground. After reset, CHANNEL is set to zero.
Micronas
125
MICRONAS [ MICRONAS ]
