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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Input signal processing  
5.4.2.1 Vertical compression and peaking  
The overall reduction of the vertical compression block can be calculated by the formula:  
512  
1
---------------------------------------- ---------------------  
Ε512 + INTVMΦ DEZVM  
The user must specify the vertical input picture size (defined by I²C Bus parameter  
ALPFIPM/ALPFIPS) and the vertical output picture size (defined by I²C Bus parameter  
APPLM/APPLS) as well as the I²C Bus parameter INTVM/INTVS (I²C Bus parameter,  
09h,0Ah,2Bh,2Ch) and DEZVM/DEZVS (I²C Bus parameter, 0Ah,2Ch), which can be  
calculated with the algorithm listed below (C-code).  
intV, dezV: variables  
for( intV=2*ALPFM/S, dezV=1; intV<=2*ALPFIPM/S; intV*=2, dezV*=2 )  
;
intV = ((512*2*ALPFIPM/S*2+intV/2)/intV);  
dezV/=2;  
if(dezV>16)  
{
intV=intV*dezV/16;  
dezV=16;  
}
INTVM/S=intV-512;  
33  
Micronas  
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