SDA9410
Preliminary Data Sheet
I²C Bus
Sub address 55
Bit
Name
Function
D5
RSHFTS
Joint Line Free Display of Master and Slave Channel by Shifting
the Output Raster Phase (SSC-Mode, RSHFTM=1): Should be
set in all operation modes to 1
1: enabled
0: disabled
SHFTSTEP
D4...D1
D0
Increment for Raster Phase Shift per Output Frame (lines)
[SHFTSTEP=0100]
MASTSLA Master / Slave Switch
1: master and slave input signals are exchanged, reset of
display raster shift
0: display raster is synchronized to input Master Channel
(vertical Sync)
Sub address 56
Bit
Name
Function
PROG_
THRES
D7...D1
Threshold to display progressive PIP without joint lines
[PROG_THRES=60]
MASLSHFT
D0
Master / Slave Shift
1: display raster is shifted slave phase to prepare a master/
slave switch
0: display raster is synchronized to input Master Channel
(vertical Sync)
Sub address 57
Bit Name
D7...D5 xxx
Function
xxx
159
Micronas
MICRONAS [ MICRONAS ]
