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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Features  
2
Features  
Different application modes  
- SRC mode:  
- High performance scan rate converter  
- High performance scan rate converter plus high resolution frame based joint-line-  
free Picture-in-Picture (maximum approximately 1/9 picture)  
- SSC mode:  
- Split screen applications with two signal sources (e.g. double window)  
- MUP mode:  
- Multipicture display mode (e.g. tuner scan)  
8 bit amplitude resolution of each input channel  
- Two input channels  
- Input frequency up to 27 MHz  
- ITU-R 656 data format (8 wires data only and additional sync information or 8 wires  
including sync information)  
- 4:2:2 luminance and chrominance parallel (2x8 wires)  
Two different representations of input chrominance data  
- 2s complement code  
- Positive dual code  
• Two flexible input sync controllers  
• Vertical peaking of the input signal  
Flexible scaling of the input signal  
- Flexible digital vertical compression of the input signal  
(1.0, ... [2 line resolution] ... , 1/32)  
- Flexible horizontal compression and expansion of the input signal  
(2.0, ... [4 pixel resolution] ... ,1.0 , ... [4 pixel resolution] ... , 1/32)  
- Panorama mode (programmable characteristic)  
Noise reduction  
- Motion adaptive spatial and temporal noise reduction (3D-NR)  
- Temporal noise reduction for luminance and chrominance, frame based or field  
based  
- Different motion detectors for luminance and chrominance or identical  
- Flexible programming of the temporal noise reduction parameters  
- Automatic measurement of the noise level (5 bit value, readable by I²C-bus)  
3-D motion estimation  
- High performance motion estimation based on block matching algorithm  
- Film mode detector (PAL and NTSC), Global motion flag (readable by I²C bus)  
• Automatic detection of letter box formats (readable by I²C bus)  
• TV mode detection by counting line numbers (PAL, NTSC, readable by I²C bus)  
Embedded memory  
- 6 Mbit embedded DRAM core for field memories  
- 1,1 Mbit embedded DRAM core for line memories, vector memory, block-to-line  
12  
Micronas