SDA9410
Preliminary Data Sheet
I²C Bus
’1’, then the store command was sent, but the data aren’t made available yet. If these
bits are ’0’ then the data were made valid and a new write or read cycle can start. The
bits VIMSTATUS, VISSTATUS and OSSTATUS may be checked before writing or
reading new data, otherwise data can be lost by overwriting.
Furthermore the bits NMSTATUS (status of noise measurement: NOISEME) and
LBDSTATUS (status of letter box I²C Bus parameters: SLAA, ELAA, STATUS_SLAA,
STATUS_ELAA, RELY) exist. NMSTATUS signalizes a new value for NOISEME. So if
NMSTATUS is read as ’0’ the current noise measurement has not been updated. If the
NMSTATUS is read as ’1’ a new noise measurement value can be read. LBSTATUS
signalizes at least a change of one of the I²C Bus parameters: SLAA, ELAA,
STATUS_SLAA, STATUS_ELAA, RELY. If the LBDSTATUS is read as ’0’ none of the
I²C Bus parameters has changed its value. If the LBDSTATUS is read as ’1’ at least one
of the I²C Bus parameters has changed its value.
The transmitted data are internally stored in registers. Writing or reading from a not
existing register is permitted and does not generate a fault by the IC.
After switching on the IC (after reset), all bits of the SDA 9410 are set to defined states.
Particularly :
Sub address Default value R/W
Take Sub address Default value R/W
over
Take
over
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
00h
00h
00h
00h
61h
88h
00h
40h
00h
00h
00h
69h
00h
90h
B4h
B4h
90h
00h
50h
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
VIM
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
48
49
48h
9Ch
00h
00h
00h
00h
00h
5Ah
B4h
48h
90h
00h
5Ah
B4h
B0h
10h
7Fh
00h
00h
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
OS
118
Micronas
MICRONAS [ MICRONAS ]
