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MSP3440G 参数 Datasheet PDF下载

MSP3440G图片预览
型号: MSP3440G
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准音频处理器系列 [Multistandard Sound Processor Family]
分类和应用:
文件页数/大小: 106 页 / 1906 K
品牌: MICRONAS [ MICRONAS ]
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DATA SHEET  
MSP 34x0G  
6. Appendix B: Manual/Compatibility Mode  
To adapt the modes of the STANDARD SELECT regis-  
ter to individual requirements and for reasons of com-  
patibility to the MSP 34x0D, the MSP 34x0G offers  
an Manual/Compatibility Mode, which provides sophis-  
ticated programming of the MSP 34x0G.  
Using the STANDARD SELECT register generally pro-  
vides  
a more economic way to program the  
MSP 34x0G and will result in optimal behavior. There-  
fore, it is not recommend to use the Manual/Com-  
patibility mode. In those cases, where the  
MSP 34x0D is to be substituted by the MSP 34x0G,  
the tips given in Section 6.9. on page 101 have to be  
obeyed by the controller software.  
6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode  
Table 6–1: Demodulator Write Registers; Subaddress: 10hex; these registers are not readable!  
Demodulator  
Write Registers  
Address MSP-  
Description  
Reset  
Mode  
Page  
(hex)  
Version  
AUTO_FM/AM  
00 21  
3410,  
3450  
1. MODUS[0]=1 (Automatic Sound Select): Switching Level threshold of 00 00  
Automatic Switching between NICAM and FM/AM in case of bad NICAM  
reception  
89  
2. MODUS[0]=0 (Manual Mode): Activation and configuration of Automatic  
Switching between NICAM and FM/AM in case of bad NICAM reception  
A2_Threshold  
CM_Threshold  
AD_CV  
00 22  
00 24  
00 BB  
00 83  
all  
all  
all  
A2 Stereo Identification Threshold  
01 90  
91  
91  
92  
93  
hex  
Carrier-Mute Threshold  
00 2A  
00 00  
hex  
SIF-input selection, configuration of AGC, and Carrier-Mute Function  
MODE_REG  
3410,  
3450  
Controlling of MSP-Demodulator and Interface options. As soon as this 00 00  
register is applied, the MSP 34x0G works in the MSP 34x0D compatibility  
mode.  
Warning: In this mode, BTSC, EIA-J, and FM-Radio are disabled. Only  
MSP 34x0D features are available; the use of MODUS and STATUS register  
is not allowed.  
The MSP 34x0G is reset to the normal mode by first programming the  
MODUS register followed by transmitting a valid standard code to the  
STANDARD SELECTION register.  
FIR1  
FIR2  
00 01  
00 05  
FIR1-filter coefficients channel 1 (6 8 bit)  
FIR2-filter coefficients channel 2 (6 8 bit), + 3 8 bit offset (total 72 bit)  
00 00  
00 00  
95  
95  
DCO1_LO  
DCO1_HI  
00 93  
00 9B  
Increment channel 1 Low Part  
Increment channel 1 High Part  
DCO2_LO  
DCO2_HI  
00 A3  
00 AB  
Increment channel 2 Low Part  
Increment channel 2 High Part  
PLL_CAPS  
00 1F  
Not of interest for the customer  
00 56  
98  
Switchable PLL capacitors to tune open-loop frequency  
Note: All registers except AUTO_FM/AM, A2_Threshold, and CM_Threshold are initialized during STANDARD SELECTION and are  
automatically updated when Automatic Sound Select (MODUS[0]=1) is on.  
Micronas  
May 27, 2003; 6251-476-1DS  
87  
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