MSP 34x0G
DATA SHEET
3.3.2.7. Read Registers on I2C Subaddress 13hex
Table 3–12: Read Registers on I2C Subaddress 13hex
Register
Address
Function
Name
QUASI-PEAK DETECTOR READOUT
00 19hex
00 1Ahex
Quasi-Peak Detector Readout Left
Quasi-Peak Detector Readout Right
QPEAK_L
QPEAK_R
bit[15:0] hex... 7FFFhex
0
Values are 16 bit two’s complement (only positive). A value of 4000hex corre-
sponds to internal full scale.
MSP 34x0G VERSION READOUT Registers
00 1Ehex MSP Hardware Version Code
MSP_HARD
bit[15:8] 03hex
MSP 34x0G - C12
A change in the hardware version code defines hardware optimizations that
may have influence on the chip’s behavior. The readout of this register is iden-
tical to the hardware version code in the chip’s imprint.
MSP Major Revision Code
MSP_REVISION
MSP_PRODUCT
bit[7:0]
07hex
MSP 34x1G - C12
The major revision code of the MSP 34x0G is 7.
00 1Fhex
MSP Product Code
bit[15:8] 00hex
0Ahex
MSP 3400G - C12
MSP 3410G - C12
MSP 3420G - C12
MSP 3440G - C12
MSP 3450G - C12
MSP 3460G - C12
14hex
28hex
32hex
3Chex
By means of the MSP-Product Code, the control processor is able to decide
which TV sound standards have to be considered.
MSP ROM Version Code
MSP_ROM
bit[7:0]
4Chex
MSP 34x0G - C12
A change in the ROM version code defines internal software optimizations,
that may have influence on the chip’s behavior, e.g. new features may have
been included. While a software change is intended to create no compatibility
problems, customers that want to use the new functions can identify new
MSP 34x0G versions according to this number.
To avoid compatibility problems with MSP 3410B and MSP 34x0D, an offset of
40hex is added to the ROM version code of the chip’s imprint.
42
May 27, 2003; 6251-476-1DS
Micronas