MSP 3400C
PRELIMINARY DATA SHEET
10. DMA Application
AMU, DMA 2386, and DMA 2381, it is recommended to
use a clock inverter circuit, as shown below right, a mini-
mum gain of 1.0 at 18.432 MHz and an output phase as
specified in Fig. 10–2.
Fig. 10–1 shows an example for the D2MAC application
with the MSP 3400 or MSP 3400C. To obtain the optimal
amplitude and phase conditions for the clock input of
+ 5 Volt
5 K
S_DATA 66
S_IDENT 64
S_CLOCK 67
9 S_DATA_IN
15 S_IDENT
8 S_CLOCK
open
AMU 2481
DMA 2381
S_Bus
Slave_mode
Software:
S_DATA_OUT 6
SBS = 1
ACS = 1
ACF = 0
13 AUDIO_CLOCK
DCOF= 1
(addr. 204, 214)
ACLK
65
17
16
18.432 MHz
3
S_DA_IN
68 S_CL
1 S_ID
1 nF
MSP 3400C C6...
MSP 3410/00
TC15/F7
MODE_REG[0] = 1
Clock
Inverter
(see below)
+2...3 V
18 AUD_CL_OUT
19 DMA_SYNC
4.7 nF
Clock Inverter
+5 V
65
ACLK
66
S_DATA
64
S_IDENT
100 nF
120
6k8
To
DMA 2386
DMA 2381/86
and AMU 2481
10 nF
BC 848C
82
3k8
Fig. 10–1: DMA application with MSP 3410 TC15 or F7
Note: Pin numbers refer to PLCC packages for DMA 2381 and MSP 3400C and to PSDIP package for AMU 2481
MICRONAS INTERMETALL
65
MICRONAS [ MICRONAS ]
