MSP 3400C
PRELIMINARY DATA SHEET
8.4. Pin Circuits
DV
SUP
P
N
2.5 V
Fig. 8–14: Input Pin 19 (DMA_SYNC)
GND
Fig. 8–9: Output Pins 1, 5, 13, 14, and 68
2
(S_ID, I S_DA_OUT, D_CTR_OUT0/1, S_CL)
DV
SUP
P
N
DV
SUP
P
N
GND
GND
Fig. 8–15: Input Pin 3
(S_DA_IN)
Fig. 8–10: Input Pins 4 and 65
(I S_DA_IN1/2)
2
P
N
N
500 k
GND
3–30 pF
3–30 pF
Fig. 8–11: Input/Output Pins 8 and 9
(I C_DA, I C_CL)
2.5 V
2
2
Fig. 8–16: Output/Input Pins 18, 20, and 21
(AUD_CL_OUT, XTALIN/OUT)
Fig. 8–12: Input Pins 11, 12, 61, and 62
(STANDBYQ, ADR_SEL, RESETQ, TESTEN)
ANAIN1+
ANAIN2+
A
D
DV
SUP
P
N
ANAIN–
VREFTOP
GND
Fig. 8–13: Input/Output Pins 6 and 7
(I S_WS, I S_CL)
Fig. 8–17: Input Pins 23–25 and 29
(ANA_IN2+, ANA_IN–, ANA_IN1+, VREFTOP)
2
2
MICRONAS INTERMETALL
51
MICRONAS [ MICRONAS ]
