MSP 3400C
PRELIMINARY DATA SHEET
8.3. Pin Configurations
S_ID
NC
S_CL
DVSUP
DVSS
I2S_DA_IN2
NC
S_DA_IN
I2S_DA_IN1
I2S_DA_OUT
I2S_WS
I2S_CL
I2C_DA
NC
NC
I2C_CL
RESETQ
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DACA_R
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
STANDBYQ
DACA_L
ADR_SEL
D_CTR_OUT0
D_CTR_OUT1
NC
VREF2
DACM_R
DACM_L
NC
NC
NC
NC
NC
AUD_CL_OUT
DMA_SYNC
XTAL_OUT
XTAL_IN
ASG3
MSP 3400C
SC2_OUT_R
SC2_OUT_L
VREF1
TESTEN
SC1_OUT_R
SC1_OUT_L
ANA_IN2+
ANA_IN–
CAPL_A
AHVSUP
CAPL_M
ANA_IN1+
AVSUP
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
AVSS
MONO_IN
VREFTOP
SC1_IN_R
SC1_IN_L
ASG1
SC2_IN_R
SC2_IN_L
AHVSS
AGNDC
NC
NC
NC
NC
SC3_IN_L
SC3_IN_R
ASG2
Fig. 8–5: 68-pin PLCC package
48
MICRONAS INTERMETALL