HAL880
DATA SHEET
5. Programming of the Sensor
– Read a register (see Fig. 5–3 on page 28)
After evaluating this command, the sensor answers
with the Acknowledge Bit, 14 Data Bits, and the
Data Parity Bit on the output.
5.1. Definition of Programming Pulses
The sensor is addressed by modulating a serial tele-
gram on the supply voltage. The sensor answers with
a serial telegram on the output pin.
– Programming the EEPROM cells (see Fig. 5–4 on
page 28)
After evaluating this command, the sensor answers
with the Acknowledge Bit. After the delay time tw,
the supply voltage rises up to the programming
voltage.
The bits in the serial telegram have a different bit time
for the VDD-line and the output. The bit time for the
VDD-line is defined through the length of the Sync Bit
at the beginning of each telegram. The bit time for the
output is defined through the Acknowledge Bit.
– Activate a sensor (see Fig. 5–5 on page 28)
If more than one sensor is connected to the supply
line, selection can be done by first deactivating all
sensors. The output of all sensors will be pulled to
ground by the internal 10 kΩ resistors. With an Acti-
vate pulse on the appropriate output pin, an individ-
ual sensor can be selected. All following commands
will only be accepted from the activated sensor.
A logical “0” is coded as no voltage change within the
bit time. A logical “1” is coded as a voltage change
between 50% and 80% of the bit time. After each bit, a
voltage change occurs.
5.2. Definition of the Telegram
t
t
f
r
V
DDH
Each telegram starts with the Sync Bit (logical 0),
3 bits for the Command (COM), the Command Parity
Bit (CP), 4 bits for the Address (ADR), and the
Address Parity Bit (AP).
t
t
p0
p0
logical 0
or
V
V
DDL
DDH
There are 4 kinds of telegrams:
t
– Write a register (see Fig. 5–2 on page 28)
p1
After the AP Bit follow 14 Data Bits (DAT) and the
Data Parity Bit (DP). If the telegram is valid and the
command has been processed, the sensor answers
with an Acknowledge Bit (logical 0) on the output.
t
t
p0
p0
logical 1
or
t
V
p1
DDL
Fig. 5–1: Definition of logical 0 and 1 bit
26
Feb. 23, 2009; DSH000152_001EN
Micronas
MICRONAS [ MICRONAS ]
