DATA SHEET
HAL82x
5.3. Telegram Codes
Sync Bit
Address Parity Bit (AP)
This parity bit is “1” if the number of zeros within the
4 Address bits is uneven. The parity bit is “0” if the
number of zeros is even.
Each telegram starts with the Sync Bit. This logical “0”
pulse defines the exact timing for tp0.
Data Bits (DAT)
Command Bits (COM)
The 14 Data Bits contain the register information.
The Command code contains 3 bits and is a binary
number. Table 5–2 shows the available commands
and the corresponding codes for the HAL82x.
The registers use different number formats for the
Data Bits. These formats are explained in Section 5.4.
In the Write command, the last bits are valid. If, for
example, the TC register (10 bits) is written, only the
last 10 bits are valid.
Command Parity Bit (CP)
This parity bit is “1” if the number of zeros within the 3
Command Bits is uneven. The parity bit is “0”, if the
number of zeros is even.
In the Read command, the first bits are valid. If, for
example, the TC register (10 bits) is read, only the first
10 bits are valid.
Address Bits (ADR)
Data Parity Bit (DP)
The Address code contains 4 bits and is a binary num-
ber. Table 5–3 shows the available addresses for the
HAL82x registers.
This parity bit is “1” if the number of zeros within the
binary number is even. The parity bit is “0” if the num-
ber of zeros is uneven.
Acknowledge
After each telegram, the output answers with the
Acknowledge signal. This logical “0” pulse defines the
exact timing for tpOUT
.
Table 5–2: Available commands
Command
READ
Code
Explanation
read a register
write a register
2
3
4
5
WRITE
PROM
program all nonvolatile registers (except the lock bits)
erase all nonvolatile registers (except the lock bits)
ERASE
Micronas
Feb. 3, 2009; DSH000143_003EN
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