HAL805
PRELIMINARY DATA SHEET
ADC-READOUT Register
14 bit
Digital
Output
Digital Signal Processing
A/D
Converter
Digital
Filter
Multiplier
Adder
Limiter
D/A
Converter
MODE Register
SENSI-
TIVITY
VOQ
CLAMP-
LOW
CLAMP-
HIGH
TC
TCSQ
5 bit
LOCKR
1 bit
Micronas
Registers
RANGE FILTER
6 bit
3 bit
3 bit
14 bit
11 bit
10 bit
11 bit
EEPROM Memory
Lock
Control
Fig. 2–3: Details of EEPROM and Digital Signal Processing
Range = 100 mT
Filter = 2 kHz
Range = 30 mT
V
V
5
Filter = 500 Hz
5
Clamp-high = 4.5 V
Clamp-high = 4 V
V
V
OUT
OUT
4
3
2
1
4
3
2
1
0
Sensitivity = 0.116
Sensitivity = –1.36
= –0.5 V
V
OQ
= 2.5 V
V
OQ
Clamp-low = 1 V
Clamp-low = 0.5 V
0
–150 –100 –50
0
50
100 150 mT
–40
–20
0
20
B
40 mT
B
Fig. 2–4: Example for output characteristics
Fig. 2–5: Example for output characteristics
6
Micronas