256Mb and 512Mb (256Mb/256Mb), P30-65nm
AC Read Specifications
Figure 32: Asynchronous Page Mode Read
tAVQV
Valid address
A[MAX:5]
tOH
tOH
tOH
tOH
A[4:1]
ADV#
0
1
2
F
tAVVH
tVHVL
tVHAX
tELQV
tGLQV
tEHQZ
tGHQZ
CE#
OE#
WAIT
DQ
tELQX
tAPA
tAPA
tAPA
tEHTZ
Q16
Q1
Q2
Q3
1. WAIT shown deasserted during asynchronous read mode (RCR10 = 0, WAIT asserted
LOW).
Note:
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
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