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PC28F00BP30EFA 参数 Datasheet PDF下载

PC28F00BP30EFA图片预览
型号: PC28F00BP30EFA
PDF下载: 下载PDF文件 查看货源
内容描述: Numonyx® Axcellâ ?? ¢ P30-65nm闪存 [Numonyx® Axcell™ P30-65nm Flash Memory]
分类和应用: 闪存内存集成电路
文件页数/大小: 86 页 / 11765 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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P30-65nm  
Table 40: Partition Region 1 Information (Sheet 2 of 2  
Offset  
P=10Ah  
Description  
(Optional flash features and commands)  
Len  
Addr.  
(P+2C)h  
(P+2D)h  
(P+2E)h  
(P+2F)h  
(P+30)h  
(P+31)h  
(P+32)h  
Partition Region 1 Erase Block Type 1 Information  
4
136:  
137:  
138:  
139:  
13A:  
13B:  
13C:  
bits 0-15 = y, y+1 = # identical-size erase blks in a partition  
bits 16-31 = z, region erase block(s) size are z x 256 bytes  
Partition 1 (Erase Block Type 1)  
2
1
Block erase cycles x 1000  
Partition 1 (erase block Type 1) bits per cell; internal EDAC  
bits 0-3 = bits per cell in erase region  
bit 4 = internal EDAC used (1=yes, 0=no)  
bits 5-7 = reserve for future use  
Partition 1 (erase block Type 1) page mode and synchronous mode capabilities defined in Table  
10  
(P+33)h  
1
13D:  
bit 0 = page-mode host reads permitted (1=yes, 0=no)  
bit 1 = synchronous host reads permitted (1=yes, 0=no)  
bit 2 = synchronous host w rites permitted (1=yes, 0=no)  
bits 3-7 = reserved for future use  
Partition Region 1 (Erase Block Type 1) Programming Region Information  
bits 0-7 = x, 2^x = Programming Region aligned size (bytes)  
(P+34)h  
6
13E:  
(P+35)h  
(P+36)h  
(P+37)h  
(P+38)h  
(P+39)h  
(P+3A)h  
(P+3B)h  
(P+3C)h  
(P+3D)h  
(P+3E)h  
(P+3F)h  
(P+40)h  
bits 8-14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7)  
bits 16-23 = y = Control Mode valid size in bytes  
13F:  
140:  
141:  
142:  
143:  
144:  
145:  
146:  
147:  
148:  
149:  
14A:  
bits 24-31 = Reserved  
bits 32-39 = z = Control Mode invalid size in bytes  
bits 40-46 = Reserved; bit 47 = Legacy flash operation (ignore 23:16 & 39:32)  
Partition Region 1 Erase Block Type 2 Information  
4
bits 0-15 = y, y+1 = # identical-size erase blks in a partition  
bits 16-31 = z, region erase block(s) size are z x 256 bytes  
Partition 1 (Erase Block Type 2)  
2
1
Block erase cycles x 1000  
Partition 1 (erase block Type 2) bits per cell; internal EDAC  
bits 0-3 = bits per cell in erase region  
bit 4 = internal EDAC used (1=yes, 0=no)  
bits 5-7 = reserve for future use  
Partition 1 (erase block Type 2) page mode and synchronous mode capabilities defined in Table  
10  
(P+41)h  
1
14B:  
bit 0 = page-mode host reads permitted (1=yes, 0=no)  
bit 1 = synchronous host reads permitted (1=yes, 0=no)  
bit 2 = synchronous host w rites permitte  
Partition Region 1 (Erase Block Type 2) Programming Region Information  
bits 0-7 = x, 2^x = Programming Region aligned size (bytes)  
bits 8-14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7)  
bits 16-23 = y = Control Mode valid size in bytes  
bits 24-31 = Reserved  
14C:  
14D:  
14E:  
14E:  
150:  
151:  
(P+42)h  
(P+43)h  
(P+44)h  
(P+45)h  
6
bits 32-39 = z = Control Mode invalid size in bytes  
bits 40-46 = Reserved;  
bit 47 = Legacy flash operation (ignore 23:16 & 39:32)  
Datasheet  
69  
Sept 2012  
OrderNumber:208042-06  
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