512Mb, Multiple I/O Serial Flash Memory
Nonvolatile and Volatile Registers
Extended Address Register
In the case of 3-byte addressability mode, the device includes an extended address reg-
ister that provides a fourth address byte A[31:24], enabling access to memory beyond
128Mb. The extended address register bits [1:0] are used to select one of the four 128Mb
segments of the memory array.
Figure 8: Upper and Lower Memory Array Segments
03FFFFFFh
03000000h
A[25:24] = 11
A[25:24] = 10
02FFFFFFh
02000000h
01FFFFFFh
01000000h
A[25:24] = 01
A[25:24] = 00
00FFFFFFh
00000000h
The PROGRAM and ERASE operations act upon the 128Mb segment selected in the ex-
tended address register.
The READ operation begins reading in the selected 128Mb segment. It is bound by the
256Mb (die segment) to which the 128Mb segment belongs. In a continuos read, when
the last byte of the die segment selected is read, the next byte output is the first byte of
the same die segment; therefore, a download of the whole array is not possible with one
READ operation. The value of the extended address register does not change when a
READ operation crosses the selected 128Mb boundary.
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
23
© 2011 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
